forked from luck/tmp_suning_uos_patched
78 lines
1.9 KiB
C
78 lines
1.9 KiB
C
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/*
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* MIPS specific sysrq operations.
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*
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* Copyright (C) 2015 Imagination Technologies Ltd.
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*/
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/sysrq.h>
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#include <linux/workqueue.h>
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#include <asm/cpu-features.h>
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#include <asm/mipsregs.h>
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#include <asm/tlbdebug.h>
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/*
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* Dump TLB entries on all CPUs.
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*/
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static DEFINE_SPINLOCK(show_lock);
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static void sysrq_tlbdump_single(void *dummy)
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{
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const int field = 2 * sizeof(unsigned long);
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unsigned long flags;
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spin_lock_irqsave(&show_lock, flags);
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pr_info("CPU%d:\n", smp_processor_id());
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pr_info("Index : %0x\n", read_c0_index());
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pr_info("Pagemask: %0x\n", read_c0_pagemask());
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pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi());
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pr_info("EntryLo0: %0*lx\n", field, read_c0_entrylo0());
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pr_info("EntryLo1: %0*lx\n", field, read_c0_entrylo1());
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pr_info("Wired : %0x\n", read_c0_wired());
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pr_info("Pagegrain: %0x\n", read_c0_pagegrain());
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if (cpu_has_htw) {
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pr_info("PWField : %0*lx\n", field, read_c0_pwfield());
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pr_info("PWSize : %0*lx\n", field, read_c0_pwsize());
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pr_info("PWCtl : %0x\n", read_c0_pwctl());
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}
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pr_info("\n");
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dump_tlb_all();
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pr_info("\n");
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spin_unlock_irqrestore(&show_lock, flags);
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}
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#ifdef CONFIG_SMP
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static void sysrq_tlbdump_othercpus(struct work_struct *dummy)
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{
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smp_call_function(sysrq_tlbdump_single, NULL, 0);
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}
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static DECLARE_WORK(sysrq_tlbdump, sysrq_tlbdump_othercpus);
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#endif
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static void sysrq_handle_tlbdump(int key)
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{
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sysrq_tlbdump_single(NULL);
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#ifdef CONFIG_SMP
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schedule_work(&sysrq_tlbdump);
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#endif
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}
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static struct sysrq_key_op sysrq_tlbdump_op = {
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.handler = sysrq_handle_tlbdump,
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.help_msg = "show-tlbs(x)",
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.action_msg = "Show TLB entries",
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.enable_mask = SYSRQ_ENABLE_DUMP,
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};
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static int __init mips_sysrq_init(void)
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{
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return register_sysrq_key('x', &sysrq_tlbdump_op);
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}
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arch_initcall(mips_sysrq_init);
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