2009-01-09 08:46:40 +08:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994, 1995, 1996, 1998, 1999, 2002, 2003 Ralf Baechle
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2011-04-05 05:15:29 +08:00
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* Copyright (C) 1996 David S. Miller (davem@davemloft.net)
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2009-01-09 08:46:40 +08:00
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* Copyright (C) 1994, 1995, 1996, by Andreas Busse
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* Copyright (C) 1999 Silicon Graphics, Inc.
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* Copyright (C) 2000 MIPS Technologies, Inc.
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* written by Carsten Langgaard, carstenl@mips.com
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*/
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2017-06-06 02:21:28 +08:00
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#include <asm/asm.h>
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#include <asm/export.h>
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#include <asm/asm-offsets.h>
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#include <asm/mipsregs.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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2009-01-09 08:46:40 +08:00
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/*
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* task_struct *resume(task_struct *prev, task_struct *next,
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2015-09-22 01:07:41 +08:00
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* struct thread_info *next_ti)
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2009-01-09 08:46:40 +08:00
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*/
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.align 7
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LEAF(resume)
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.set arch=octeon
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mfc0 t1, CP0_STATUS
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LONG_S t1, THREAD_STATUS(a0)
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cpu_save_nonscratch a0
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LONG_S ra, THREAD_REG31(a0)
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#if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
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/* Check if we need to store CVMSEG state */
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2015-01-15 21:11:08 +08:00
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dmfc0 t0, $11,7 /* CvmMemCtl */
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2009-01-09 08:46:40 +08:00
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bbit0 t0, 6, 3f /* Is user access enabled? */
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/* Store the CVMSEG state */
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/* Extract the size of CVMSEG */
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andi t0, 0x3f
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/* Multiply * (cache line size/sizeof(long)/2) */
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sll t0, 7-LONGLOG-1
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2013-01-22 19:59:30 +08:00
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li t1, -32768 /* Base address of CVMSEG */
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LONG_ADDI t2, a0, THREAD_CVMSEG /* Where to store CVMSEG to */
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2009-01-09 08:46:40 +08:00
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synciobdma
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2:
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.set noreorder
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LONG_L t8, 0(t1) /* Load from CVMSEG */
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subu t0, 1 /* Decrement loop var */
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LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */
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LONG_ADDU t1, LONGSIZE*2 /* Increment loc in CVMSEG */
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LONG_S t8, 0(t2) /* Store CVMSEG to thread storage */
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LONG_ADDU t2, LONGSIZE*2 /* Increment loc in thread storage */
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bnez t0, 2b /* Loop until we've copied it all */
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2013-01-22 19:59:30 +08:00
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LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */
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2009-01-09 08:46:40 +08:00
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.set reorder
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/* Disable access to CVMSEG */
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2015-01-15 21:11:08 +08:00
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dmfc0 t0, $11,7 /* CvmMemCtl */
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2009-01-09 08:46:40 +08:00
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xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */
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2015-01-15 21:11:08 +08:00
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dmtc0 t0, $11,7 /* CvmMemCtl */
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2009-01-09 08:46:40 +08:00
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#endif
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3:
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2013-06-18 03:36:07 +08:00
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Kbuild: rename CC_STACKPROTECTOR[_STRONG] config variables
The changes to automatically test for working stack protector compiler
support in the Kconfig files removed the special STACKPROTECTOR_AUTO
option that picked the strongest stack protector that the compiler
supported.
That was all a nice cleanup - it makes no sense to have the AUTO case
now that the Kconfig phase can just determine the compiler support
directly.
HOWEVER.
It also meant that doing "make oldconfig" would now _disable_ the strong
stackprotector if you had AUTO enabled, because in a legacy config file,
the sane stack protector configuration would look like
CONFIG_HAVE_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR_NONE is not set
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
CONFIG_CC_STACKPROTECTOR_AUTO=y
and when you ran this through "make oldconfig" with the Kbuild changes,
it would ask you about the regular CONFIG_CC_STACKPROTECTOR (that had
been renamed from CONFIG_CC_STACKPROTECTOR_REGULAR to just
CONFIG_CC_STACKPROTECTOR), but it would think that the STRONG version
used to be disabled (because it was really enabled by AUTO), and would
disable it in the new config, resulting in:
CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_CC_HAS_STACKPROTECTOR_NONE=y
CONFIG_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
CONFIG_CC_HAS_SANE_STACKPROTECTOR=y
That's dangerously subtle - people could suddenly find themselves with
the weaker stack protector setup without even realizing.
The solution here is to just rename not just the old RECULAR stack
protector option, but also the strong one. This does that by just
removing the CC_ prefix entirely for the user choices, because it really
is not about the compiler support (the compiler support now instead
automatially impacts _visibility_ of the options to users).
This results in "make oldconfig" actually asking the user for their
choice, so that we don't have any silent subtle security model changes.
The end result would generally look like this:
CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_CC_HAS_STACKPROTECTOR_NONE=y
CONFIG_STACKPROTECTOR=y
CONFIG_STACKPROTECTOR_STRONG=y
CONFIG_CC_HAS_SANE_STACKPROTECTOR=y
where the "CC_" versions really are about internal compiler
infrastructure, not the user selections.
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-06-14 11:21:18 +08:00
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#if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
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2013-10-07 19:14:26 +08:00
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PTR_LA t8, __stack_chk_guard
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2013-06-18 03:36:07 +08:00
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LONG_L t9, TASK_STACK_CANARY(a1)
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LONG_S t9, 0(t8)
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#endif
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2009-01-09 08:46:40 +08:00
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/*
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* The order of restoring the registers takes care of the race
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* updating $28, $29 and kernelsp without disabling ints.
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*/
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move $28, a2
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cpu_restore_nonscratch a1
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2014-05-29 05:52:04 +08:00
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PTR_ADDU t0, $28, _THREAD_SIZE - 32
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2009-01-09 08:46:40 +08:00
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set_saved_sp t0, t1, t2
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mfc0 t1, CP0_STATUS /* Do we really need this? */
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li a3, 0xff01
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and t1, a3
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LONG_L a2, THREAD_STATUS(a1)
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nor a3, $0, a3
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and a2, a3
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or a2, t1
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mtc0 a2, CP0_STATUS
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move v0, a0
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jr ra
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END(resume)
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/*
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* void octeon_cop2_save(struct octeon_cop2_state *a0)
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*/
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.align 7
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2015-01-15 21:11:07 +08:00
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.set push
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.set noreorder
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2009-01-09 08:46:40 +08:00
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LEAF(octeon_cop2_save)
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dmfc0 t9, $9,7 /* CvmCtl register. */
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2013-01-22 19:59:30 +08:00
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/* Save the COP2 CRC state */
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2009-01-09 08:46:40 +08:00
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dmfc2 t0, 0x0201
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dmfc2 t1, 0x0202
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dmfc2 t2, 0x0200
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sd t0, OCTEON_CP2_CRC_IV(a0)
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sd t1, OCTEON_CP2_CRC_LENGTH(a0)
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/* Skip next instructions if CvmCtl[NODFA_CP2] set */
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bbit1 t9, 28, 1f
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2015-01-15 21:11:07 +08:00
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sd t2, OCTEON_CP2_CRC_POLY(a0)
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2009-01-09 08:46:40 +08:00
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/* Save the LLM state */
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dmfc2 t0, 0x0402
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dmfc2 t1, 0x040A
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sd t0, OCTEON_CP2_LLM_DAT(a0)
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2013-01-22 19:59:30 +08:00
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1: bbit1 t9, 26, 3f /* done if CvmCtl[NOCRYPTO] set */
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2015-01-15 21:11:07 +08:00
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sd t1, OCTEON_CP2_LLM_DAT+8(a0)
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2009-01-09 08:46:40 +08:00
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/* Save the COP2 crypto state */
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2013-01-22 19:59:30 +08:00
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/* this part is mostly common to both pass 1 and later revisions */
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dmfc2 t0, 0x0084
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dmfc2 t1, 0x0080
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dmfc2 t2, 0x0081
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dmfc2 t3, 0x0082
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2009-01-09 08:46:40 +08:00
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sd t0, OCTEON_CP2_3DES_IV(a0)
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2013-01-22 19:59:30 +08:00
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dmfc2 t0, 0x0088
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2009-01-09 08:46:40 +08:00
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sd t1, OCTEON_CP2_3DES_KEY(a0)
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2013-01-22 19:59:30 +08:00
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dmfc2 t1, 0x0111 /* only necessary for pass 1 */
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2009-01-09 08:46:40 +08:00
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sd t2, OCTEON_CP2_3DES_KEY+8(a0)
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2013-01-22 19:59:30 +08:00
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dmfc2 t2, 0x0102
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2009-01-09 08:46:40 +08:00
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sd t3, OCTEON_CP2_3DES_KEY+16(a0)
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2013-01-22 19:59:30 +08:00
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dmfc2 t3, 0x0103
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2009-01-09 08:46:40 +08:00
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sd t0, OCTEON_CP2_3DES_RESULT(a0)
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2013-01-22 19:59:30 +08:00
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dmfc2 t0, 0x0104
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sd t1, OCTEON_CP2_AES_INP0(a0) /* only necessary for pass 1 */
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dmfc2 t1, 0x0105
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2009-01-09 08:46:40 +08:00
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sd t2, OCTEON_CP2_AES_IV(a0)
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dmfc2 t2, 0x0106
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sd t3, OCTEON_CP2_AES_IV+8(a0)
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2013-01-22 19:59:30 +08:00
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dmfc2 t3, 0x0107
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2009-01-09 08:46:40 +08:00
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sd t0, OCTEON_CP2_AES_KEY(a0)
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dmfc2 t0, 0x0110
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sd t1, OCTEON_CP2_AES_KEY+8(a0)
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dmfc2 t1, 0x0100
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sd t2, OCTEON_CP2_AES_KEY+16(a0)
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dmfc2 t2, 0x0101
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sd t3, OCTEON_CP2_AES_KEY+24(a0)
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2015-01-15 21:11:07 +08:00
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mfc0 v0, $15,0 /* Get the processor ID register */
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2009-01-09 08:46:40 +08:00
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sd t0, OCTEON_CP2_AES_KEYLEN(a0)
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2015-01-15 21:11:07 +08:00
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li v1, 0x000d0000 /* This is the processor ID of Octeon Pass1 */
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2009-01-09 08:46:40 +08:00
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sd t1, OCTEON_CP2_AES_RESULT(a0)
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/* Skip to the Pass1 version of the remainder of the COP2 state */
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2015-01-15 21:11:07 +08:00
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beq v0, v1, 2f
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sd t2, OCTEON_CP2_AES_RESULT+8(a0)
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2009-01-09 08:46:40 +08:00
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2013-01-22 19:59:30 +08:00
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/* the non-pass1 state when !CvmCtl[NOCRYPTO] */
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2009-01-09 08:46:40 +08:00
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dmfc2 t1, 0x0240
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dmfc2 t2, 0x0241
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2015-01-15 21:11:07 +08:00
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ori v1, v1, 0x9500 /* lowest OCTEON III PrId*/
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2009-01-09 08:46:40 +08:00
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dmfc2 t3, 0x0242
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2015-01-15 21:11:07 +08:00
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subu v1, v0, v1 /* prid - lowest OCTEON III PrId */
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2009-01-09 08:46:40 +08:00
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dmfc2 t0, 0x0243
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sd t1, OCTEON_CP2_HSH_DATW(a0)
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dmfc2 t1, 0x0244
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sd t2, OCTEON_CP2_HSH_DATW+8(a0)
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dmfc2 t2, 0x0245
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sd t3, OCTEON_CP2_HSH_DATW+16(a0)
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dmfc2 t3, 0x0246
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sd t0, OCTEON_CP2_HSH_DATW+24(a0)
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dmfc2 t0, 0x0247
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sd t1, OCTEON_CP2_HSH_DATW+32(a0)
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dmfc2 t1, 0x0248
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sd t2, OCTEON_CP2_HSH_DATW+40(a0)
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dmfc2 t2, 0x0249
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sd t3, OCTEON_CP2_HSH_DATW+48(a0)
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dmfc2 t3, 0x024A
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sd t0, OCTEON_CP2_HSH_DATW+56(a0)
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dmfc2 t0, 0x024B
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sd t1, OCTEON_CP2_HSH_DATW+64(a0)
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dmfc2 t1, 0x024C
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sd t2, OCTEON_CP2_HSH_DATW+72(a0)
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dmfc2 t2, 0x024D
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sd t3, OCTEON_CP2_HSH_DATW+80(a0)
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2013-01-22 19:59:30 +08:00
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dmfc2 t3, 0x024E
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2009-01-09 08:46:40 +08:00
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sd t0, OCTEON_CP2_HSH_DATW+88(a0)
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dmfc2 t0, 0x0250
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sd t1, OCTEON_CP2_HSH_DATW+96(a0)
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dmfc2 t1, 0x0251
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sd t2, OCTEON_CP2_HSH_DATW+104(a0)
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dmfc2 t2, 0x0252
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sd t3, OCTEON_CP2_HSH_DATW+112(a0)
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dmfc2 t3, 0x0253
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sd t0, OCTEON_CP2_HSH_IVW(a0)
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dmfc2 t0, 0x0254
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sd t1, OCTEON_CP2_HSH_IVW+8(a0)
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dmfc2 t1, 0x0255
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sd t2, OCTEON_CP2_HSH_IVW+16(a0)
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dmfc2 t2, 0x0256
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sd t3, OCTEON_CP2_HSH_IVW+24(a0)
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dmfc2 t3, 0x0257
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sd t0, OCTEON_CP2_HSH_IVW+32(a0)
|
2013-01-22 19:59:30 +08:00
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dmfc2 t0, 0x0258
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2009-01-09 08:46:40 +08:00
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sd t1, OCTEON_CP2_HSH_IVW+40(a0)
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2013-01-22 19:59:30 +08:00
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dmfc2 t1, 0x0259
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2009-01-09 08:46:40 +08:00
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sd t2, OCTEON_CP2_HSH_IVW+48(a0)
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dmfc2 t2, 0x025E
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sd t3, OCTEON_CP2_HSH_IVW+56(a0)
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dmfc2 t3, 0x025A
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sd t0, OCTEON_CP2_GFM_MULT(a0)
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dmfc2 t0, 0x025B
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sd t1, OCTEON_CP2_GFM_MULT+8(a0)
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sd t2, OCTEON_CP2_GFM_POLY(a0)
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sd t3, OCTEON_CP2_GFM_RESULT(a0)
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2015-01-15 21:11:07 +08:00
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bltz v1, 4f
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sd t0, OCTEON_CP2_GFM_RESULT+8(a0)
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/* OCTEON III things*/
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dmfc2 t0, 0x024F
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dmfc2 t1, 0x0050
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sd t0, OCTEON_CP2_SHA3(a0)
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sd t1, OCTEON_CP2_SHA3+8(a0)
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4:
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2009-01-09 08:46:40 +08:00
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jr ra
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2015-01-15 21:11:07 +08:00
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nop
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2009-01-09 08:46:40 +08:00
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|
|
2013-01-22 19:59:30 +08:00
|
|
|
2: /* pass 1 special stuff when !CvmCtl[NOCRYPTO] */
|
2009-01-09 08:46:40 +08:00
|
|
|
dmfc2 t3, 0x0040
|
|
|
|
|
dmfc2 t0, 0x0041
|
|
|
|
|
dmfc2 t1, 0x0042
|
|
|
|
|
dmfc2 t2, 0x0043
|
|
|
|
|
sd t3, OCTEON_CP2_HSH_DATW(a0)
|
|
|
|
|
dmfc2 t3, 0x0044
|
|
|
|
|
sd t0, OCTEON_CP2_HSH_DATW+8(a0)
|
|
|
|
|
dmfc2 t0, 0x0045
|
|
|
|
|
sd t1, OCTEON_CP2_HSH_DATW+16(a0)
|
|
|
|
|
dmfc2 t1, 0x0046
|
|
|
|
|
sd t2, OCTEON_CP2_HSH_DATW+24(a0)
|
|
|
|
|
dmfc2 t2, 0x0048
|
|
|
|
|
sd t3, OCTEON_CP2_HSH_DATW+32(a0)
|
|
|
|
|
dmfc2 t3, 0x0049
|
|
|
|
|
sd t0, OCTEON_CP2_HSH_DATW+40(a0)
|
|
|
|
|
dmfc2 t0, 0x004A
|
|
|
|
|
sd t1, OCTEON_CP2_HSH_DATW+48(a0)
|
|
|
|
|
sd t2, OCTEON_CP2_HSH_IVW(a0)
|
|
|
|
|
sd t3, OCTEON_CP2_HSH_IVW+8(a0)
|
|
|
|
|
sd t0, OCTEON_CP2_HSH_IVW+16(a0)
|
|
|
|
|
|
2013-01-22 19:59:30 +08:00
|
|
|
3: /* pass 1 or CvmCtl[NOCRYPTO] set */
|
2009-01-09 08:46:40 +08:00
|
|
|
jr ra
|
2015-01-15 21:11:07 +08:00
|
|
|
nop
|
2009-01-09 08:46:40 +08:00
|
|
|
END(octeon_cop2_save)
|
2015-01-15 21:11:07 +08:00
|
|
|
.set pop
|
2009-01-09 08:46:40 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* void octeon_cop2_restore(struct octeon_cop2_state *a0)
|
|
|
|
|
*/
|
|
|
|
|
.align 7
|
|
|
|
|
.set push
|
|
|
|
|
.set noreorder
|
|
|
|
|
LEAF(octeon_cop2_restore)
|
2013-01-22 19:59:30 +08:00
|
|
|
/* First cache line was prefetched before the call */
|
|
|
|
|
pref 4, 128(a0)
|
2009-01-09 08:46:40 +08:00
|
|
|
dmfc0 t9, $9,7 /* CvmCtl register. */
|
|
|
|
|
|
2013-01-22 19:59:30 +08:00
|
|
|
pref 4, 256(a0)
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t0, OCTEON_CP2_CRC_IV(a0)
|
2013-01-22 19:59:30 +08:00
|
|
|
pref 4, 384(a0)
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t1, OCTEON_CP2_CRC_LENGTH(a0)
|
|
|
|
|
ld t2, OCTEON_CP2_CRC_POLY(a0)
|
|
|
|
|
|
|
|
|
|
/* Restore the COP2 CRC state */
|
|
|
|
|
dmtc2 t0, 0x0201
|
2013-01-22 19:59:30 +08:00
|
|
|
dmtc2 t1, 0x1202
|
2009-01-09 08:46:40 +08:00
|
|
|
bbit1 t9, 28, 2f /* Skip LLM if CvmCtl[NODFA_CP2] is set */
|
|
|
|
|
dmtc2 t2, 0x4200
|
|
|
|
|
|
|
|
|
|
/* Restore the LLM state */
|
|
|
|
|
ld t0, OCTEON_CP2_LLM_DAT(a0)
|
|
|
|
|
ld t1, OCTEON_CP2_LLM_DAT+8(a0)
|
|
|
|
|
dmtc2 t0, 0x0402
|
|
|
|
|
dmtc2 t1, 0x040A
|
|
|
|
|
|
|
|
|
|
2:
|
|
|
|
|
bbit1 t9, 26, done_restore /* done if CvmCtl[NOCRYPTO] set */
|
|
|
|
|
nop
|
|
|
|
|
|
|
|
|
|
/* Restore the COP2 crypto state common to pass 1 and pass 2 */
|
|
|
|
|
ld t0, OCTEON_CP2_3DES_IV(a0)
|
|
|
|
|
ld t1, OCTEON_CP2_3DES_KEY(a0)
|
|
|
|
|
ld t2, OCTEON_CP2_3DES_KEY+8(a0)
|
2013-01-22 19:59:30 +08:00
|
|
|
dmtc2 t0, 0x0084
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t0, OCTEON_CP2_3DES_KEY+16(a0)
|
2013-01-22 19:59:30 +08:00
|
|
|
dmtc2 t1, 0x0080
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t1, OCTEON_CP2_3DES_RESULT(a0)
|
2013-01-22 19:59:30 +08:00
|
|
|
dmtc2 t2, 0x0081
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t2, OCTEON_CP2_AES_INP0(a0) /* only really needed for pass 1 */
|
|
|
|
|
dmtc2 t0, 0x0082
|
|
|
|
|
ld t0, OCTEON_CP2_AES_IV(a0)
|
2013-01-22 19:59:30 +08:00
|
|
|
dmtc2 t1, 0x0098
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t1, OCTEON_CP2_AES_IV+8(a0)
|
2013-01-22 19:59:30 +08:00
|
|
|
dmtc2 t2, 0x010A /* only really needed for pass 1 */
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t2, OCTEON_CP2_AES_KEY(a0)
|
2013-01-22 19:59:30 +08:00
|
|
|
dmtc2 t0, 0x0102
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t0, OCTEON_CP2_AES_KEY+8(a0)
|
|
|
|
|
dmtc2 t1, 0x0103
|
|
|
|
|
ld t1, OCTEON_CP2_AES_KEY+16(a0)
|
|
|
|
|
dmtc2 t2, 0x0104
|
|
|
|
|
ld t2, OCTEON_CP2_AES_KEY+24(a0)
|
|
|
|
|
dmtc2 t0, 0x0105
|
|
|
|
|
ld t0, OCTEON_CP2_AES_KEYLEN(a0)
|
|
|
|
|
dmtc2 t1, 0x0106
|
|
|
|
|
ld t1, OCTEON_CP2_AES_RESULT(a0)
|
|
|
|
|
dmtc2 t2, 0x0107
|
|
|
|
|
ld t2, OCTEON_CP2_AES_RESULT+8(a0)
|
2013-01-22 19:59:30 +08:00
|
|
|
mfc0 t3, $15,0 /* Get the processor ID register */
|
2009-01-09 08:46:40 +08:00
|
|
|
dmtc2 t0, 0x0110
|
2015-01-15 21:11:07 +08:00
|
|
|
li v0, 0x000d0000 /* This is the processor ID of Octeon Pass1 */
|
2009-01-09 08:46:40 +08:00
|
|
|
dmtc2 t1, 0x0100
|
2015-01-15 21:11:07 +08:00
|
|
|
bne v0, t3, 3f /* Skip the next stuff for non-pass1 */
|
2009-01-09 08:46:40 +08:00
|
|
|
dmtc2 t2, 0x0101
|
|
|
|
|
|
2013-01-22 19:59:30 +08:00
|
|
|
/* this code is specific for pass 1 */
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t0, OCTEON_CP2_HSH_DATW(a0)
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_DATW+8(a0)
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_DATW+16(a0)
|
|
|
|
|
dmtc2 t0, 0x0040
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_DATW+24(a0)
|
|
|
|
|
dmtc2 t1, 0x0041
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_DATW+32(a0)
|
|
|
|
|
dmtc2 t2, 0x0042
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_DATW+40(a0)
|
|
|
|
|
dmtc2 t0, 0x0043
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_DATW+48(a0)
|
|
|
|
|
dmtc2 t1, 0x0044
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_IVW(a0)
|
|
|
|
|
dmtc2 t2, 0x0045
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_IVW+8(a0)
|
|
|
|
|
dmtc2 t0, 0x0046
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_IVW+16(a0)
|
|
|
|
|
dmtc2 t1, 0x0048
|
|
|
|
|
dmtc2 t2, 0x0049
|
2013-01-22 19:59:30 +08:00
|
|
|
b done_restore /* unconditional branch */
|
2009-01-09 08:46:40 +08:00
|
|
|
dmtc2 t0, 0x004A
|
|
|
|
|
|
2013-01-22 19:59:30 +08:00
|
|
|
3: /* this is post-pass1 code */
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t2, OCTEON_CP2_HSH_DATW(a0)
|
2015-01-15 21:11:07 +08:00
|
|
|
ori v0, v0, 0x9500 /* lowest OCTEON III PrId*/
|
2009-01-09 08:46:40 +08:00
|
|
|
ld t0, OCTEON_CP2_HSH_DATW+8(a0)
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_DATW+16(a0)
|
|
|
|
|
dmtc2 t2, 0x0240
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_DATW+24(a0)
|
|
|
|
|
dmtc2 t0, 0x0241
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_DATW+32(a0)
|
|
|
|
|
dmtc2 t1, 0x0242
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_DATW+40(a0)
|
|
|
|
|
dmtc2 t2, 0x0243
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_DATW+48(a0)
|
|
|
|
|
dmtc2 t0, 0x0244
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_DATW+56(a0)
|
|
|
|
|
dmtc2 t1, 0x0245
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_DATW+64(a0)
|
|
|
|
|
dmtc2 t2, 0x0246
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_DATW+72(a0)
|
|
|
|
|
dmtc2 t0, 0x0247
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_DATW+80(a0)
|
|
|
|
|
dmtc2 t1, 0x0248
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_DATW+88(a0)
|
|
|
|
|
dmtc2 t2, 0x0249
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_DATW+96(a0)
|
|
|
|
|
dmtc2 t0, 0x024A
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_DATW+104(a0)
|
|
|
|
|
dmtc2 t1, 0x024B
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_DATW+112(a0)
|
|
|
|
|
dmtc2 t2, 0x024C
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_IVW(a0)
|
|
|
|
|
dmtc2 t0, 0x024D
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_IVW+8(a0)
|
|
|
|
|
dmtc2 t1, 0x024E
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_IVW+16(a0)
|
|
|
|
|
dmtc2 t2, 0x0250
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_IVW+24(a0)
|
|
|
|
|
dmtc2 t0, 0x0251
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_IVW+32(a0)
|
|
|
|
|
dmtc2 t1, 0x0252
|
|
|
|
|
ld t1, OCTEON_CP2_HSH_IVW+40(a0)
|
|
|
|
|
dmtc2 t2, 0x0253
|
|
|
|
|
ld t2, OCTEON_CP2_HSH_IVW+48(a0)
|
|
|
|
|
dmtc2 t0, 0x0254
|
|
|
|
|
ld t0, OCTEON_CP2_HSH_IVW+56(a0)
|
|
|
|
|
dmtc2 t1, 0x0255
|
|
|
|
|
ld t1, OCTEON_CP2_GFM_MULT(a0)
|
|
|
|
|
dmtc2 t2, 0x0256
|
|
|
|
|
ld t2, OCTEON_CP2_GFM_MULT+8(a0)
|
|
|
|
|
dmtc2 t0, 0x0257
|
|
|
|
|
ld t0, OCTEON_CP2_GFM_POLY(a0)
|
|
|
|
|
dmtc2 t1, 0x0258
|
|
|
|
|
ld t1, OCTEON_CP2_GFM_RESULT(a0)
|
|
|
|
|
dmtc2 t2, 0x0259
|
|
|
|
|
ld t2, OCTEON_CP2_GFM_RESULT+8(a0)
|
|
|
|
|
dmtc2 t0, 0x025E
|
2015-01-15 21:11:07 +08:00
|
|
|
subu v0, t3, v0 /* prid - lowest OCTEON III PrId */
|
2009-01-09 08:46:40 +08:00
|
|
|
dmtc2 t1, 0x025A
|
2015-01-15 21:11:07 +08:00
|
|
|
bltz v0, done_restore
|
|
|
|
|
dmtc2 t2, 0x025B
|
|
|
|
|
/* OCTEON III things*/
|
|
|
|
|
ld t0, OCTEON_CP2_SHA3(a0)
|
|
|
|
|
ld t1, OCTEON_CP2_SHA3+8(a0)
|
|
|
|
|
dmtc2 t0, 0x0051
|
|
|
|
|
dmtc2 t1, 0x0050
|
2009-01-09 08:46:40 +08:00
|
|
|
done_restore:
|
|
|
|
|
jr ra
|
|
|
|
|
nop
|
|
|
|
|
END(octeon_cop2_restore)
|
|
|
|
|
.set pop
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* void octeon_mult_save()
|
|
|
|
|
* sp is assumed to point to a struct pt_regs
|
|
|
|
|
*
|
2015-01-15 21:11:05 +08:00
|
|
|
* NOTE: This is called in SAVE_TEMP in stackframe.h. It can
|
|
|
|
|
* safely modify v1,k0, k1,$10-$15, and $24. It will
|
|
|
|
|
* be overwritten with a processor specific version of the code.
|
2009-01-09 08:46:40 +08:00
|
|
|
*/
|
2015-01-15 21:11:05 +08:00
|
|
|
.p2align 7
|
2009-01-09 08:46:40 +08:00
|
|
|
.set push
|
|
|
|
|
.set noreorder
|
|
|
|
|
LEAF(octeon_mult_save)
|
2015-01-15 21:11:05 +08:00
|
|
|
jr ra
|
2009-01-09 08:46:40 +08:00
|
|
|
nop
|
2015-01-15 21:11:05 +08:00
|
|
|
.space 30 * 4, 0
|
|
|
|
|
octeon_mult_save_end:
|
|
|
|
|
EXPORT(octeon_mult_save_end)
|
|
|
|
|
END(octeon_mult_save)
|
2009-01-09 08:46:40 +08:00
|
|
|
|
2015-01-15 21:11:05 +08:00
|
|
|
LEAF(octeon_mult_save2)
|
|
|
|
|
/* Save the multiplier state OCTEON II and earlier*/
|
2009-01-09 08:46:40 +08:00
|
|
|
v3mulu k0, $0, $0
|
|
|
|
|
v3mulu k1, $0, $0
|
2013-01-22 19:59:30 +08:00
|
|
|
sd k0, PT_MTP(sp) /* PT_MTP has P0 */
|
2009-01-09 08:46:40 +08:00
|
|
|
v3mulu k0, $0, $0
|
|
|
|
|
sd k1, PT_MTP+8(sp) /* PT_MTP+8 has P1 */
|
|
|
|
|
ori k1, $0, 1
|
|
|
|
|
v3mulu k1, k1, $0
|
|
|
|
|
sd k0, PT_MTP+16(sp) /* PT_MTP+16 has P2 */
|
|
|
|
|
v3mulu k0, $0, $0
|
2013-01-22 19:59:30 +08:00
|
|
|
sd k1, PT_MPL(sp) /* PT_MPL has MPL0 */
|
2009-01-09 08:46:40 +08:00
|
|
|
v3mulu k1, $0, $0
|
|
|
|
|
sd k0, PT_MPL+8(sp) /* PT_MPL+8 has MPL1 */
|
|
|
|
|
jr ra
|
|
|
|
|
sd k1, PT_MPL+16(sp) /* PT_MPL+16 has MPL2 */
|
2015-01-15 21:11:05 +08:00
|
|
|
octeon_mult_save2_end:
|
|
|
|
|
EXPORT(octeon_mult_save2_end)
|
|
|
|
|
END(octeon_mult_save2)
|
|
|
|
|
|
|
|
|
|
LEAF(octeon_mult_save3)
|
|
|
|
|
/* Save the multiplier state OCTEON III */
|
|
|
|
|
v3mulu $10, $0, $0 /* read P0 */
|
|
|
|
|
v3mulu $11, $0, $0 /* read P1 */
|
|
|
|
|
v3mulu $12, $0, $0 /* read P2 */
|
|
|
|
|
sd $10, PT_MTP+(0*8)(sp) /* store P0 */
|
|
|
|
|
v3mulu $10, $0, $0 /* read P3 */
|
|
|
|
|
sd $11, PT_MTP+(1*8)(sp) /* store P1 */
|
|
|
|
|
v3mulu $11, $0, $0 /* read P4 */
|
|
|
|
|
sd $12, PT_MTP+(2*8)(sp) /* store P2 */
|
|
|
|
|
ori $13, $0, 1
|
|
|
|
|
v3mulu $12, $0, $0 /* read P5 */
|
|
|
|
|
sd $10, PT_MTP+(3*8)(sp) /* store P3 */
|
|
|
|
|
v3mulu $13, $13, $0 /* P4-P0 = MPL5-MPL1, $13 = MPL0 */
|
|
|
|
|
sd $11, PT_MTP+(4*8)(sp) /* store P4 */
|
|
|
|
|
v3mulu $10, $0, $0 /* read MPL1 */
|
|
|
|
|
sd $12, PT_MTP+(5*8)(sp) /* store P5 */
|
|
|
|
|
v3mulu $11, $0, $0 /* read MPL2 */
|
|
|
|
|
sd $13, PT_MPL+(0*8)(sp) /* store MPL0 */
|
|
|
|
|
v3mulu $12, $0, $0 /* read MPL3 */
|
|
|
|
|
sd $10, PT_MPL+(1*8)(sp) /* store MPL1 */
|
|
|
|
|
v3mulu $10, $0, $0 /* read MPL4 */
|
|
|
|
|
sd $11, PT_MPL+(2*8)(sp) /* store MPL2 */
|
|
|
|
|
v3mulu $11, $0, $0 /* read MPL5 */
|
|
|
|
|
sd $12, PT_MPL+(3*8)(sp) /* store MPL3 */
|
|
|
|
|
sd $10, PT_MPL+(4*8)(sp) /* store MPL4 */
|
2009-01-09 08:46:40 +08:00
|
|
|
jr ra
|
2015-01-15 21:11:05 +08:00
|
|
|
sd $11, PT_MPL+(5*8)(sp) /* store MPL5 */
|
|
|
|
|
octeon_mult_save3_end:
|
|
|
|
|
EXPORT(octeon_mult_save3_end)
|
|
|
|
|
END(octeon_mult_save3)
|
2009-01-09 08:46:40 +08:00
|
|
|
.set pop
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* void octeon_mult_restore()
|
|
|
|
|
* sp is assumed to point to a struct pt_regs
|
|
|
|
|
*
|
2015-01-15 21:11:05 +08:00
|
|
|
* NOTE: This is called in RESTORE_TEMP in stackframe.h.
|
2009-01-09 08:46:40 +08:00
|
|
|
*/
|
2015-01-15 21:11:05 +08:00
|
|
|
.p2align 7
|
2009-01-09 08:46:40 +08:00
|
|
|
.set push
|
|
|
|
|
.set noreorder
|
|
|
|
|
LEAF(octeon_mult_restore)
|
2015-01-15 21:11:05 +08:00
|
|
|
jr ra
|
|
|
|
|
nop
|
|
|
|
|
.space 30 * 4, 0
|
|
|
|
|
octeon_mult_restore_end:
|
|
|
|
|
EXPORT(octeon_mult_restore_end)
|
|
|
|
|
END(octeon_mult_restore)
|
2009-01-09 08:46:40 +08:00
|
|
|
|
2015-01-15 21:11:05 +08:00
|
|
|
LEAF(octeon_mult_restore2)
|
|
|
|
|
ld v0, PT_MPL(sp) /* MPL0 */
|
|
|
|
|
ld v1, PT_MPL+8(sp) /* MPL1 */
|
|
|
|
|
ld k0, PT_MPL+16(sp) /* MPL2 */
|
2009-01-09 08:46:40 +08:00
|
|
|
/* Restore the multiplier state */
|
2015-01-15 21:11:05 +08:00
|
|
|
ld k1, PT_MTP+16(sp) /* P2 */
|
|
|
|
|
mtm0 v0 /* MPL0 */
|
2009-01-09 08:46:40 +08:00
|
|
|
ld v0, PT_MTP+8(sp) /* P1 */
|
2015-01-15 21:11:05 +08:00
|
|
|
mtm1 v1 /* MPL1 */
|
|
|
|
|
ld v1, PT_MTP(sp) /* P0 */
|
|
|
|
|
mtm2 k0 /* MPL2 */
|
|
|
|
|
mtp2 k1 /* P2 */
|
|
|
|
|
mtp1 v0 /* P1 */
|
2009-01-09 08:46:40 +08:00
|
|
|
jr ra
|
2015-01-15 21:11:05 +08:00
|
|
|
mtp0 v1 /* P0 */
|
|
|
|
|
octeon_mult_restore2_end:
|
|
|
|
|
EXPORT(octeon_mult_restore2_end)
|
|
|
|
|
END(octeon_mult_restore2)
|
|
|
|
|
|
|
|
|
|
LEAF(octeon_mult_restore3)
|
|
|
|
|
ld $12, PT_MPL+(0*8)(sp) /* read MPL0 */
|
|
|
|
|
ld $13, PT_MPL+(3*8)(sp) /* read MPL3 */
|
|
|
|
|
ld $10, PT_MPL+(1*8)(sp) /* read MPL1 */
|
|
|
|
|
ld $11, PT_MPL+(4*8)(sp) /* read MPL4 */
|
|
|
|
|
.word 0x718d0008
|
|
|
|
|
/* mtm0 $12, $13 restore MPL0 and MPL3 */
|
|
|
|
|
ld $12, PT_MPL+(2*8)(sp) /* read MPL2 */
|
|
|
|
|
.word 0x714b000c
|
|
|
|
|
/* mtm1 $10, $11 restore MPL1 and MPL4 */
|
|
|
|
|
ld $13, PT_MPL+(5*8)(sp) /* read MPL5 */
|
|
|
|
|
ld $10, PT_MTP+(0*8)(sp) /* read P0 */
|
|
|
|
|
ld $11, PT_MTP+(3*8)(sp) /* read P3 */
|
|
|
|
|
.word 0x718d000d
|
|
|
|
|
/* mtm2 $12, $13 restore MPL2 and MPL5 */
|
|
|
|
|
ld $12, PT_MTP+(1*8)(sp) /* read P1 */
|
|
|
|
|
.word 0x714b0009
|
|
|
|
|
/* mtp0 $10, $11 restore P0 and P3 */
|
|
|
|
|
ld $13, PT_MTP+(4*8)(sp) /* read P4 */
|
|
|
|
|
ld $10, PT_MTP+(2*8)(sp) /* read P2 */
|
|
|
|
|
ld $11, PT_MTP+(5*8)(sp) /* read P5 */
|
|
|
|
|
.word 0x718d000a
|
|
|
|
|
/* mtp1 $12, $13 restore P1 and P4 */
|
2009-01-09 08:46:40 +08:00
|
|
|
jr ra
|
2015-01-15 21:11:05 +08:00
|
|
|
.word 0x714b000b
|
|
|
|
|
/* mtp2 $10, $11 restore P2 and P5 */
|
|
|
|
|
|
|
|
|
|
octeon_mult_restore3_end:
|
|
|
|
|
EXPORT(octeon_mult_restore3_end)
|
|
|
|
|
END(octeon_mult_restore3)
|
2009-01-09 08:46:40 +08:00
|
|
|
.set pop
|