2006-03-27 17:16:46 +08:00
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/*
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* Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
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*
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* Copyright (c) 2000 Nils Faerber
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*
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* Based on rtc.c by Paul Gortmaker
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*
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* Original Driver by Nils Faerber <nils@kernelconcepts.de>
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*
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* Modifications from:
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* CIH <cih@coventive.com>
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2009-09-14 15:25:28 +08:00
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* Nicolas Pitre <nico@fluxnic.net>
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2006-03-27 17:16:46 +08:00
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* Andrew Christian <andrew.christian@hp.com>
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*
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* Converted to the RTC subsystem and Driver Model
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* by Richard Purdie <rpurdie@rpsys.net>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/rtc.h>
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#include <linux/init.h>
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#include <linux/fs.h>
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#include <linux/interrupt.h>
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2012-01-19 19:55:21 +08:00
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#include <linux/string.h>
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2006-03-27 17:16:46 +08:00
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#include <linux/pm.h>
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2012-01-19 19:55:21 +08:00
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#include <linux/bitops.h>
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2006-03-27 17:16:46 +08:00
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2008-08-05 23:14:15 +08:00
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#include <mach/hardware.h>
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2006-03-27 17:16:46 +08:00
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#include <asm/irq.h>
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2012-01-19 19:55:21 +08:00
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#ifdef CONFIG_ARCH_PXA
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#include <mach/regs-rtc.h>
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#endif
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2010-10-19 05:33:53 +08:00
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#define RTC_DEF_DIVIDER (32768 - 1)
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2006-03-27 17:16:46 +08:00
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#define RTC_DEF_TRIM 0
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2012-01-19 19:55:21 +08:00
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static const unsigned long RTC_FREQ = 1024;
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static DEFINE_SPINLOCK(sa1100_rtc_lock);
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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
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static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
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2006-03-27 17:16:46 +08:00
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{
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struct platform_device *pdev = to_platform_device(dev_id);
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2012-01-19 19:55:21 +08:00
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struct rtc_device *rtc = platform_get_drvdata(pdev);
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2006-03-27 17:16:46 +08:00
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unsigned int rtsr;
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unsigned long events = 0;
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2012-01-19 19:55:21 +08:00
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spin_lock(&sa1100_rtc_lock);
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2006-03-27 17:16:46 +08:00
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2012-01-19 19:55:21 +08:00
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rtsr = RTSR;
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2006-03-27 17:16:46 +08:00
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/* clear interrupt sources */
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2012-01-19 19:55:21 +08:00
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RTSR = 0;
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2010-10-19 05:35:54 +08:00
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/* Fix for a nasty initialization problem the in SA11xx RTSR register.
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* See also the comments in sa1100_rtc_probe(). */
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if (rtsr & (RTSR_ALE | RTSR_HZE)) {
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/* This is the original code, before there was the if test
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* above. This code does not clear interrupts that were not
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* enabled. */
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2012-01-19 19:55:21 +08:00
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RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
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2010-10-19 05:35:54 +08:00
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} else {
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/* For some reason, it is possible to enter this routine
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* without interruptions enabled, it has been tested with
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* several units (Bug in SA11xx chip?).
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*
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* This situation leads to an infinite "loop" of interrupt
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* routine calling and as a result the processor seems to
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* lock on its first call to open(). */
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2012-01-19 19:55:21 +08:00
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RTSR = RTSR_AL | RTSR_HZ;
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2010-10-19 05:35:54 +08:00
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}
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2006-03-27 17:16:46 +08:00
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/* clear alarm interrupt if it has occurred */
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if (rtsr & RTSR_AL)
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rtsr &= ~RTSR_ALE;
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2012-01-19 19:55:21 +08:00
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RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
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2006-03-27 17:16:46 +08:00
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/* update irq data & counter */
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if (rtsr & RTSR_AL)
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events |= RTC_AF | RTC_IRQF;
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if (rtsr & RTSR_HZ)
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events |= RTC_UF | RTC_IRQF;
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2012-01-19 19:55:21 +08:00
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rtc_update_irq(rtc, 1, events);
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2006-03-27 17:16:46 +08:00
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2012-01-19 19:55:21 +08:00
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spin_unlock(&sa1100_rtc_lock);
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2006-03-27 17:16:46 +08:00
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return IRQ_HANDLED;
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}
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static int sa1100_rtc_open(struct device *dev)
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{
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int ret;
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2012-01-19 19:55:21 +08:00
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struct platform_device *plat_dev = to_platform_device(dev);
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struct rtc_device *rtc = platform_get_drvdata(plat_dev);
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2006-03-27 17:16:46 +08:00
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2012-03-24 06:02:34 +08:00
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ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev);
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2006-03-27 17:16:46 +08:00
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if (ret) {
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2012-01-19 19:55:21 +08:00
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dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
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2006-03-27 17:16:46 +08:00
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goto fail_ui;
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}
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2012-03-24 06:02:34 +08:00
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ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, 0,
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"rtc Alrm", dev);
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2006-03-27 17:16:46 +08:00
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if (ret) {
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2012-01-19 19:55:21 +08:00
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dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
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2006-03-27 17:16:46 +08:00
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goto fail_ai;
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}
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2012-01-19 19:55:21 +08:00
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rtc->max_user_freq = RTC_FREQ;
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rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
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2010-12-17 04:31:32 +08:00
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2006-03-27 17:16:46 +08:00
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return 0;
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fail_ai:
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2012-01-19 19:55:21 +08:00
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free_irq(IRQ_RTC1Hz, dev);
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2006-03-27 17:16:46 +08:00
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fail_ui:
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return ret;
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}
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static void sa1100_rtc_release(struct device *dev)
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{
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2012-01-19 19:55:21 +08:00
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spin_lock_irq(&sa1100_rtc_lock);
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RTSR = 0;
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spin_unlock_irq(&sa1100_rtc_lock);
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2006-03-27 17:16:46 +08:00
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2012-01-19 19:55:21 +08:00
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free_irq(IRQ_RTCAlrm, dev);
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free_irq(IRQ_RTC1Hz, dev);
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2006-03-27 17:16:46 +08:00
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}
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2011-02-03 09:02:41 +08:00
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static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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2012-01-19 19:55:21 +08:00
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spin_lock_irq(&sa1100_rtc_lock);
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2011-02-03 09:02:41 +08:00
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if (enabled)
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2012-01-19 19:55:21 +08:00
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RTSR |= RTSR_ALE;
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2011-02-03 09:02:41 +08:00
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else
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2012-01-19 19:55:21 +08:00
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RTSR &= ~RTSR_ALE;
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spin_unlock_irq(&sa1100_rtc_lock);
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2011-02-03 09:02:41 +08:00
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return 0;
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}
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2006-03-27 17:16:46 +08:00
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static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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2012-01-19 19:55:21 +08:00
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rtc_time_to_tm(RCNR, tm);
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2006-03-27 17:16:46 +08:00
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return 0;
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}
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static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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unsigned long time;
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int ret;
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ret = rtc_tm_to_time(tm, &time);
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if (ret == 0)
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2012-01-19 19:55:21 +08:00
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RCNR = time;
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2006-03-27 17:16:46 +08:00
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return ret;
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}
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static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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2012-01-19 19:55:21 +08:00
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u32 rtsr;
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2007-02-21 05:58:13 +08:00
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2012-01-19 19:55:21 +08:00
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rtsr = RTSR;
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2007-02-21 05:58:13 +08:00
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alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
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alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
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2006-03-27 17:16:46 +08:00
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return 0;
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}
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static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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2012-02-20 19:49:30 +08:00
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unsigned long time;
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2012-01-19 19:55:21 +08:00
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int ret;
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2006-03-27 17:16:46 +08:00
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2012-01-19 19:55:21 +08:00
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spin_lock_irq(&sa1100_rtc_lock);
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2012-02-20 19:49:30 +08:00
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ret = rtc_tm_to_time(&alrm->time, &time);
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if (ret != 0)
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goto out;
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RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
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RTAR = time;
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if (alrm->enabled)
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RTSR |= RTSR_ALE;
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else
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RTSR &= ~RTSR_ALE;
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out:
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2012-01-19 19:55:21 +08:00
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spin_unlock_irq(&sa1100_rtc_lock);
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2006-03-27 17:16:46 +08:00
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2012-01-19 19:55:21 +08:00
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return ret;
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2006-03-27 17:16:46 +08:00
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}
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static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
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{
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2012-01-19 19:55:21 +08:00
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seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
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seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
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2006-03-27 17:16:46 +08:00
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return 0;
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}
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2006-10-01 14:28:17 +08:00
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static const struct rtc_class_ops sa1100_rtc_ops = {
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2006-03-27 17:16:46 +08:00
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.open = sa1100_rtc_open,
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.release = sa1100_rtc_release,
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.read_time = sa1100_rtc_read_time,
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.set_time = sa1100_rtc_set_time,
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.read_alarm = sa1100_rtc_read_alarm,
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.set_alarm = sa1100_rtc_set_alarm,
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.proc = sa1100_rtc_proc,
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2011-02-03 09:02:41 +08:00
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.alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
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2006-03-27 17:16:46 +08:00
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};
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static int sa1100_rtc_probe(struct platform_device *pdev)
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{
|
2012-01-19 19:55:21 +08:00
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struct rtc_device *rtc;
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2006-03-27 17:16:46 +08:00
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/*
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* According to the manual we should be able to let RTTR be zero
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* and then a default diviser for a 32.768KHz clock is used.
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* Apparently this doesn't work, at least for my SA1110 rev 5.
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* If the clock divider is uninitialized then reset it to the
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* default value to get the 1Hz clock.
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*/
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2012-01-19 19:55:21 +08:00
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if (RTTR == 0) {
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RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
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dev_warn(&pdev->dev, "warning: "
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"initializing default clock divider/trim value\n");
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2006-03-27 17:16:46 +08:00
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/* The current RTC value probably doesn't make sense either */
|
2012-01-19 19:55:21 +08:00
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RCNR = 0;
|
2006-03-27 17:16:46 +08:00
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}
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|
2008-06-18 16:54:03 +08:00
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device_init_wakeup(&pdev->dev, 1);
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|
2012-01-19 19:55:21 +08:00
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rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
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THIS_MODULE);
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if (IS_ERR(rtc))
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return PTR_ERR(rtc);
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platform_set_drvdata(pdev, rtc);
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|
2010-10-19 05:35:54 +08:00
|
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/* Fix for a nasty initialization problem the in SA11xx RTSR register.
|
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* See also the comments in sa1100_rtc_interrupt().
|
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*
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* Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
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* interrupt pending, even though interrupts were never enabled.
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* In this case, this bit it must be reset before enabling
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* interruptions to avoid a nonexistent interrupt to occur.
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*
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* In principle, the same problem would apply to bit 0, although it has
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* never been observed to happen.
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*
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|
* This issue is addressed both here and in sa1100_rtc_interrupt().
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* If the issue is not addressed here, in the times when the processor
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* wakes up with the bit set there will be one spurious interrupt.
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*
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|
* The issue is also dealt with in sa1100_rtc_interrupt() to be on the
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* safe side, once the condition that lead to this strange
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|
* initialization is unknown and could in principle happen during
|
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* normal processing.
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*
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|
* Notice that clearing bit 1 and 0 is accomplished by writting ONES to
|
|
|
|
* the corresponding bits in RTSR. */
|
2012-01-19 19:55:21 +08:00
|
|
|
RTSR = RTSR_AL | RTSR_HZ;
|
2010-10-19 05:35:54 +08:00
|
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|
2006-03-27 17:16:46 +08:00
|
|
|
return 0;
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|
}
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static int sa1100_rtc_remove(struct platform_device *pdev)
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|
|
|
{
|
2012-01-19 19:55:21 +08:00
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struct rtc_device *rtc = platform_get_drvdata(pdev);
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if (rtc)
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rtc_device_unregister(rtc);
|
2006-03-27 17:16:46 +08:00
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return 0;
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|
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}
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|
2007-11-13 06:49:58 +08:00
|
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|
#ifdef CONFIG_PM
|
2009-07-21 14:31:09 +08:00
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|
|
static int sa1100_rtc_suspend(struct device *dev)
|
2007-11-13 06:49:58 +08:00
|
|
|
{
|
2009-07-21 14:31:09 +08:00
|
|
|
if (device_may_wakeup(dev))
|
2012-01-19 19:55:21 +08:00
|
|
|
enable_irq_wake(IRQ_RTCAlrm);
|
2007-11-13 06:49:58 +08:00
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|
|
return 0;
|
|
|
|
}
|
|
|
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|
2009-07-21 14:31:09 +08:00
|
|
|
static int sa1100_rtc_resume(struct device *dev)
|
2007-11-13 06:49:58 +08:00
|
|
|
{
|
2009-07-21 14:31:09 +08:00
|
|
|
if (device_may_wakeup(dev))
|
2012-01-19 19:55:21 +08:00
|
|
|
disable_irq_wake(IRQ_RTCAlrm);
|
2007-11-13 06:49:58 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2009-07-21 14:31:09 +08:00
|
|
|
|
2009-12-15 10:00:08 +08:00
|
|
|
static const struct dev_pm_ops sa1100_rtc_pm_ops = {
|
2009-07-21 14:31:09 +08:00
|
|
|
.suspend = sa1100_rtc_suspend,
|
|
|
|
.resume = sa1100_rtc_resume,
|
|
|
|
};
|
2007-11-13 06:49:58 +08:00
|
|
|
#endif
|
|
|
|
|
2006-03-27 17:16:46 +08:00
|
|
|
static struct platform_driver sa1100_rtc_driver = {
|
|
|
|
.probe = sa1100_rtc_probe,
|
|
|
|
.remove = sa1100_rtc_remove,
|
|
|
|
.driver = {
|
2009-07-21 14:31:09 +08:00
|
|
|
.name = "sa1100-rtc",
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
.pm = &sa1100_rtc_pm_ops,
|
|
|
|
#endif
|
2006-03-27 17:16:46 +08:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2012-01-11 07:10:48 +08:00
|
|
|
module_platform_driver(sa1100_rtc_driver);
|
2006-03-27 17:16:46 +08:00
|
|
|
|
|
|
|
MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
|
|
|
|
MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
|
|
|
|
MODULE_LICENSE("GPL");
|
2008-04-11 12:29:25 +08:00
|
|
|
MODULE_ALIAS("platform:sa1100-rtc");
|