2005-04-17 06:20:36 +08:00
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#ifndef __ASM_SH_IRQ_H
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#define __ASM_SH_IRQ_H
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#include <asm/machvec.h>
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2007-03-12 13:09:35 +08:00
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/*
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* A sane default based on a reasonable vector table size, platforms are
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* advised to cap this at the hard limit that they're interested in
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* through the machvec.
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2005-04-17 06:20:36 +08:00
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*/
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2009-05-22 12:50:18 +08:00
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#define NR_IRQS 256
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#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */
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2005-04-17 06:20:36 +08:00
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2006-12-06 11:05:02 +08:00
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/*
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* Convert back and forth between INTEVT and IRQ values.
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*/
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2007-03-14 12:03:35 +08:00
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#ifdef CONFIG_CPU_HAS_INTEVT
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2006-12-06 11:05:02 +08:00
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#define evt2irq(evt) (((evt) >> 5) - 16)
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#define irq2evt(irq) (((irq) + 16) << 5)
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2007-03-14 12:03:35 +08:00
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#else
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#define evt2irq(evt) (evt)
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#define irq2evt(irq) (irq)
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#endif
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2006-12-06 11:05:02 +08:00
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2005-04-17 06:20:36 +08:00
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/*
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* Simple Mask Register Support
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*/
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extern void make_maskreg_irq(unsigned int irq);
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extern unsigned short *irq_mask_register;
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2006-09-27 16:03:56 +08:00
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/*
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* PINT IRQs
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*/
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void init_IRQ_pint(void);
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2006-12-06 11:05:02 +08:00
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void make_imask_irq(unsigned int irq);
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2005-04-17 06:20:36 +08:00
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static inline int generic_irq_demux(int irq)
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{
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return irq;
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}
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2006-11-20 12:55:34 +08:00
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#define irq_demux(irq) sh_mv.mv_irq_demux(irq)
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2005-04-17 06:20:36 +08:00
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2008-09-04 17:53:58 +08:00
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void init_IRQ(void);
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asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
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2007-11-02 11:16:51 +08:00
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#ifdef CONFIG_IRQSTACKS
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2006-09-27 17:22:14 +08:00
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extern void irq_ctx_init(int cpu);
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extern void irq_ctx_exit(int cpu);
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# define __ARCH_HAS_DO_SOFTIRQ
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#else
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# define irq_ctx_init(cpu) do { } while (0)
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# define irq_ctx_exit(cpu) do { } while (0)
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#endif
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2009-06-14 22:21:54 +08:00
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#include <asm-generic/irq.h>
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2008-02-13 19:16:47 +08:00
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#ifdef CONFIG_CPU_SH5
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2008-07-29 07:09:44 +08:00
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#include <cpu/irq.h>
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2008-02-13 19:16:47 +08:00
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#endif
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2005-04-17 06:20:36 +08:00
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#endif /* __ASM_SH_IRQ_H */
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