2019-06-04 16:11:33 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2011-02-14 10:10:43 +08:00
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/*
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* Altera SPI driver
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*
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* Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
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*
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* Based on spi_s3c24xx.c, which is:
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* Copyright (c) 2006 Ben Dooks
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* Copyright (c) 2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*/
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#include <linux/interrupt.h>
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#include <linux/errno.h>
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2011-07-04 03:44:29 +08:00
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#include <linux/module.h>
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2011-02-14 10:10:43 +08:00
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#include <linux/platform_device.h>
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2020-06-11 11:25:07 +08:00
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#include <linux/spi/altera.h>
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2011-02-14 10:10:43 +08:00
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#include <linux/spi/spi.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#define DRV_NAME "spi_altera"
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#define ALTERA_SPI_RXDATA 0
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#define ALTERA_SPI_TXDATA 4
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#define ALTERA_SPI_STATUS 8
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#define ALTERA_SPI_CONTROL 12
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#define ALTERA_SPI_SLAVE_SEL 20
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#define ALTERA_SPI_STATUS_ROE_MSK 0x8
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#define ALTERA_SPI_STATUS_TOE_MSK 0x10
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#define ALTERA_SPI_STATUS_TMT_MSK 0x20
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#define ALTERA_SPI_STATUS_TRDY_MSK 0x40
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#define ALTERA_SPI_STATUS_RRDY_MSK 0x80
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#define ALTERA_SPI_STATUS_E_MSK 0x100
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#define ALTERA_SPI_CONTROL_IROE_MSK 0x8
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#define ALTERA_SPI_CONTROL_ITOE_MSK 0x10
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#define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40
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#define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80
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#define ALTERA_SPI_CONTROL_IE_MSK 0x100
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#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
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2020-06-11 11:25:07 +08:00
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#define ALTERA_SPI_MAX_CS 32
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2020-06-19 09:43:40 +08:00
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enum altera_spi_type {
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ALTERA_SPI_TYPE_UNKNOWN,
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ALTERA_SPI_TYPE_SUBDEV,
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};
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2011-02-14 10:10:43 +08:00
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struct altera_spi {
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int irq;
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int len;
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int count;
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int bytes_per_word;
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2020-06-19 09:43:41 +08:00
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u32 imr;
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2011-02-14 10:10:43 +08:00
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/* data buffers */
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const unsigned char *tx;
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unsigned char *rx;
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2020-06-19 09:43:39 +08:00
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struct regmap *regmap;
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2020-06-19 09:43:40 +08:00
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u32 regoff;
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2020-06-19 09:43:39 +08:00
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struct device *dev;
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};
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static const struct regmap_config spi_altera_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.fast_io = true,
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2011-02-14 10:10:43 +08:00
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};
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2020-06-19 09:43:39 +08:00
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static int altr_spi_writel(struct altera_spi *hw, unsigned int reg,
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unsigned int val)
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{
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int ret;
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2020-06-19 09:43:40 +08:00
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ret = regmap_write(hw->regmap, hw->regoff + reg, val);
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2020-06-19 09:43:39 +08:00
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if (ret)
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dev_err(hw->dev, "fail to write reg 0x%x val 0x%x: %d\n",
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reg, val, ret);
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return ret;
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}
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static int altr_spi_readl(struct altera_spi *hw, unsigned int reg,
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unsigned int *val)
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{
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int ret;
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2020-06-19 09:43:40 +08:00
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ret = regmap_read(hw->regmap, hw->regoff + reg, val);
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2020-06-19 09:43:39 +08:00
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if (ret)
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dev_err(hw->dev, "fail to read reg 0x%x: %d\n", reg, ret);
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return ret;
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}
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2011-02-14 10:10:43 +08:00
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static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
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{
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return spi_master_get_devdata(sdev->master);
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}
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2017-08-16 17:33:11 +08:00
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static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
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2011-02-14 10:10:43 +08:00
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{
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struct altera_spi *hw = altera_spi_to_hw(spi);
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2017-08-16 17:33:11 +08:00
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if (is_high) {
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hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
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2020-06-19 09:43:39 +08:00
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altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
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altr_spi_writel(hw, ALTERA_SPI_SLAVE_SEL, 0);
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2011-02-14 10:10:43 +08:00
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} else {
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2020-06-19 09:43:39 +08:00
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altr_spi_writel(hw, ALTERA_SPI_SLAVE_SEL,
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BIT(spi->chip_select));
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2017-08-16 17:33:11 +08:00
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hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
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2020-06-19 09:43:39 +08:00
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altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
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2011-02-14 10:10:43 +08:00
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}
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}
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2017-08-16 17:33:12 +08:00
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static void altera_spi_tx_word(struct altera_spi *hw)
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2011-02-14 10:10:43 +08:00
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{
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2017-08-16 17:33:12 +08:00
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unsigned int txd = 0;
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2011-02-14 10:10:43 +08:00
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if (hw->tx) {
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switch (hw->bytes_per_word) {
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case 1:
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2017-08-16 17:33:12 +08:00
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txd = hw->tx[hw->count];
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break;
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2011-02-14 10:10:43 +08:00
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case 2:
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2017-08-16 17:33:12 +08:00
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txd = (hw->tx[hw->count * 2]
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| (hw->tx[hw->count * 2 + 1] << 8));
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break;
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2020-06-11 11:25:06 +08:00
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case 4:
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txd = (hw->tx[hw->count * 4]
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| (hw->tx[hw->count * 4 + 1] << 8)
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| (hw->tx[hw->count * 4 + 2] << 16)
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| (hw->tx[hw->count * 4 + 3] << 24));
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break;
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2011-02-14 10:10:43 +08:00
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}
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}
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2017-08-16 17:33:12 +08:00
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2020-06-19 09:43:39 +08:00
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altr_spi_writel(hw, ALTERA_SPI_TXDATA, txd);
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2017-08-16 17:33:12 +08:00
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}
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static void altera_spi_rx_word(struct altera_spi *hw)
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{
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unsigned int rxd;
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2020-06-19 09:43:39 +08:00
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altr_spi_readl(hw, ALTERA_SPI_RXDATA, &rxd);
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2017-08-16 17:33:12 +08:00
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if (hw->rx) {
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switch (hw->bytes_per_word) {
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case 1:
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hw->rx[hw->count] = rxd;
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break;
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case 2:
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hw->rx[hw->count * 2] = rxd;
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hw->rx[hw->count * 2 + 1] = rxd >> 8;
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break;
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2020-06-11 11:25:06 +08:00
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case 4:
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hw->rx[hw->count * 4] = rxd;
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hw->rx[hw->count * 4 + 1] = rxd >> 8;
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hw->rx[hw->count * 4 + 2] = rxd >> 16;
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hw->rx[hw->count * 4 + 3] = rxd >> 24;
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break;
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2017-08-16 17:33:12 +08:00
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}
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}
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hw->count++;
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2011-02-14 10:10:43 +08:00
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}
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2017-08-16 17:33:11 +08:00
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static int altera_spi_txrx(struct spi_master *master,
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struct spi_device *spi, struct spi_transfer *t)
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2011-02-14 10:10:43 +08:00
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{
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2017-08-16 17:33:11 +08:00
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struct altera_spi *hw = spi_master_get_devdata(master);
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2020-06-19 09:43:39 +08:00
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u32 val;
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2011-02-14 10:10:43 +08:00
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hw->tx = t->tx_buf;
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hw->rx = t->rx_buf;
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hw->count = 0;
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2013-08-29 23:41:20 +08:00
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hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
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2011-02-14 10:10:43 +08:00
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hw->len = t->len / hw->bytes_per_word;
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if (hw->irq >= 0) {
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/* enable receive interrupt */
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hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;
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2020-06-19 09:43:39 +08:00
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altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
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2011-02-14 10:10:43 +08:00
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/* send the first byte */
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2017-08-16 17:33:12 +08:00
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altera_spi_tx_word(hw);
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2013-08-15 14:18:46 +08:00
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2020-12-29 13:27:41 +08:00
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return 1;
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}
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2020-06-19 09:43:39 +08:00
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2020-12-29 13:27:41 +08:00
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while (hw->count < hw->len) {
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altera_spi_tx_word(hw);
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2011-02-14 10:10:43 +08:00
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2020-12-29 13:27:41 +08:00
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for (;;) {
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altr_spi_readl(hw, ALTERA_SPI_STATUS, &val);
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if (val & ALTERA_SPI_STATUS_RRDY_MSK)
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break;
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cpu_relax();
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2011-02-14 10:10:43 +08:00
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}
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2020-12-29 13:27:41 +08:00
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altera_spi_rx_word(hw);
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2011-02-14 10:10:43 +08:00
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}
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2020-12-29 13:27:41 +08:00
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spi_finalize_current_transfer(master);
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2011-02-14 10:10:43 +08:00
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2020-12-29 13:27:41 +08:00
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return 0;
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2011-02-14 10:10:43 +08:00
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}
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static irqreturn_t altera_spi_irq(int irq, void *dev)
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{
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2017-08-16 17:33:11 +08:00
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struct spi_master *master = dev;
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struct altera_spi *hw = spi_master_get_devdata(master);
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2011-02-14 10:10:43 +08:00
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2017-08-16 17:33:12 +08:00
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altera_spi_rx_word(hw);
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2011-02-14 10:10:43 +08:00
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2017-08-16 17:33:11 +08:00
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if (hw->count < hw->len) {
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2017-08-16 17:33:12 +08:00
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altera_spi_tx_word(hw);
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2017-08-16 17:33:11 +08:00
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} else {
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/* disable receive interrupt */
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hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
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2020-06-19 09:43:39 +08:00
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altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
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2017-08-16 17:33:11 +08:00
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spi_finalize_current_transfer(master);
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}
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2011-02-14 10:10:43 +08:00
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return IRQ_HANDLED;
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}
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2012-12-08 00:57:14 +08:00
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static int altera_spi_probe(struct platform_device *pdev)
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2011-02-14 10:10:43 +08:00
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{
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2020-06-19 09:43:40 +08:00
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const struct platform_device_id *platid = platform_get_device_id(pdev);
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2020-06-11 11:25:07 +08:00
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struct altera_spi_platform_data *pdata = dev_get_platdata(&pdev->dev);
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2020-06-19 09:43:40 +08:00
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enum altera_spi_type type = ALTERA_SPI_TYPE_UNKNOWN;
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2011-02-14 10:10:43 +08:00
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struct altera_spi *hw;
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struct spi_master *master;
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int err = -ENODEV;
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2020-06-19 09:43:39 +08:00
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u32 val;
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2020-06-11 11:25:08 +08:00
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u16 i;
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2011-02-14 10:10:43 +08:00
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master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
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if (!master)
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return err;
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/* setup the master state. */
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master->bus_num = pdev->id;
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2020-06-11 11:25:07 +08:00
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if (pdata) {
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if (pdata->num_chipselect > ALTERA_SPI_MAX_CS) {
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dev_err(&pdev->dev,
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"Invalid number of chipselect: %hu\n",
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pdata->num_chipselect);
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2021-01-20 16:26:35 +08:00
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err = -EINVAL;
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goto exit;
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2020-06-11 11:25:07 +08:00
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}
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master->num_chipselect = pdata->num_chipselect;
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master->mode_bits = pdata->mode_bits;
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master->bits_per_word_mask = pdata->bits_per_word_mask;
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} else {
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master->num_chipselect = 16;
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master->mode_bits = SPI_CS_HIGH;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
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}
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2014-03-21 11:21:58 +08:00
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master->dev.of_node = pdev->dev.of_node;
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2017-08-16 17:33:11 +08:00
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master->transfer_one = altera_spi_txrx;
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master->set_cs = altera_spi_set_cs;
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2011-02-14 10:10:43 +08:00
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hw = spi_master_get_devdata(master);
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2020-06-19 09:43:39 +08:00
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hw->dev = &pdev->dev;
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2011-02-14 10:10:43 +08:00
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2020-06-19 09:43:40 +08:00
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if (platid)
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type = platid->driver_data;
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2011-02-14 10:10:43 +08:00
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/* find and map our resources */
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2020-06-19 09:43:40 +08:00
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if (type == ALTERA_SPI_TYPE_SUBDEV) {
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struct resource *regoff;
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2020-06-19 09:43:39 +08:00
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2020-06-19 09:43:40 +08:00
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hw->regmap = dev_get_regmap(pdev->dev.parent, NULL);
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if (!hw->regmap) {
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dev_err(&pdev->dev, "get regmap failed\n");
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goto exit;
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}
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regoff = platform_get_resource(pdev, IORESOURCE_REG, 0);
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if (regoff)
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hw->regoff = regoff->start;
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} else {
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void __iomem *res;
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res = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(res)) {
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err = PTR_ERR(res);
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goto exit;
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}
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|
hw->regmap = devm_regmap_init_mmio(&pdev->dev, res,
|
|
|
|
&spi_altera_config);
|
|
|
|
if (IS_ERR(hw->regmap)) {
|
|
|
|
dev_err(&pdev->dev, "regmap mmio init failed\n");
|
|
|
|
err = PTR_ERR(hw->regmap);
|
|
|
|
goto exit;
|
|
|
|
}
|
2020-06-19 09:43:39 +08:00
|
|
|
}
|
|
|
|
|
2011-02-14 10:10:43 +08:00
|
|
|
/* program defaults into the registers */
|
|
|
|
hw->imr = 0; /* disable spi interrupts */
|
2020-06-19 09:43:39 +08:00
|
|
|
altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
|
|
|
|
altr_spi_writel(hw, ALTERA_SPI_STATUS, 0); /* clear status reg */
|
|
|
|
altr_spi_readl(hw, ALTERA_SPI_STATUS, &val);
|
|
|
|
if (val & ALTERA_SPI_STATUS_RRDY_MSK)
|
|
|
|
altr_spi_readl(hw, ALTERA_SPI_RXDATA, &val); /* flush rxdata */
|
2011-02-14 10:10:43 +08:00
|
|
|
/* irq is optional */
|
|
|
|
hw->irq = platform_get_irq(pdev, 0);
|
|
|
|
if (hw->irq >= 0) {
|
|
|
|
err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
|
2017-08-16 17:33:11 +08:00
|
|
|
pdev->name, master);
|
2011-02-14 10:10:43 +08:00
|
|
|
if (err)
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
2017-08-16 17:33:11 +08:00
|
|
|
err = devm_spi_register_master(&pdev->dev, master);
|
2011-02-14 10:10:43 +08:00
|
|
|
if (err)
|
|
|
|
goto exit;
|
2020-06-11 11:25:08 +08:00
|
|
|
|
|
|
|
if (pdata) {
|
|
|
|
for (i = 0; i < pdata->num_devices; i++) {
|
|
|
|
if (!spi_new_device(master, pdata->devices + i))
|
|
|
|
dev_warn(&pdev->dev,
|
|
|
|
"unable to create SPI device: %s\n",
|
|
|
|
pdata->devices[i].modalias);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-06-19 09:43:40 +08:00
|
|
|
dev_info(&pdev->dev, "regoff %u, irq %d\n", hw->regoff, hw->irq);
|
2011-02-14 10:10:43 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
exit:
|
|
|
|
spi_master_put(master);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_OF
|
|
|
|
static const struct of_device_id altera_spi_match[] = {
|
|
|
|
{ .compatible = "ALTR,spi-1.0", },
|
2013-08-15 04:25:19 +08:00
|
|
|
{ .compatible = "altr,spi-1.0", },
|
2011-02-14 10:10:43 +08:00
|
|
|
{},
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, altera_spi_match);
|
|
|
|
#endif /* CONFIG_OF */
|
|
|
|
|
2020-06-19 09:43:40 +08:00
|
|
|
static const struct platform_device_id altera_spi_ids[] = {
|
2020-06-24 09:31:25 +08:00
|
|
|
{ DRV_NAME, ALTERA_SPI_TYPE_UNKNOWN },
|
|
|
|
{ "subdev_spi_altera", ALTERA_SPI_TYPE_SUBDEV },
|
2020-06-19 09:43:40 +08:00
|
|
|
{ }
|
|
|
|
};
|
2020-06-24 09:31:26 +08:00
|
|
|
MODULE_DEVICE_TABLE(platform, altera_spi_ids);
|
2020-06-19 09:43:40 +08:00
|
|
|
|
2011-02-14 10:10:43 +08:00
|
|
|
static struct platform_driver altera_spi_driver = {
|
|
|
|
.probe = altera_spi_probe,
|
|
|
|
.driver = {
|
|
|
|
.name = DRV_NAME,
|
|
|
|
.pm = NULL,
|
2012-08-15 15:30:28 +08:00
|
|
|
.of_match_table = of_match_ptr(altera_spi_match),
|
2011-02-14 10:10:43 +08:00
|
|
|
},
|
2020-06-19 09:43:40 +08:00
|
|
|
.id_table = altera_spi_ids,
|
2011-02-14 10:10:43 +08:00
|
|
|
};
|
2011-10-06 01:29:49 +08:00
|
|
|
module_platform_driver(altera_spi_driver);
|
2011-02-14 10:10:43 +08:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Altera SPI driver");
|
|
|
|
MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_ALIAS("platform:" DRV_NAME);
|