forked from luck/tmp_suning_uos_patched
71 lines
3.0 KiB
C
71 lines
3.0 KiB
C
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#ifndef _ASM_IA64_SIGCONTEXT_H
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#define _ASM_IA64_SIGCONTEXT_H
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/*
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* Copyright (C) 1998, 1999, 2001 Hewlett-Packard Co
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* Copyright (C) 1998, 1999, 2001 David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <asm/fpu.h>
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#define IA64_SC_FLAG_ONSTACK_BIT 0 /* is handler running on signal stack? */
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#define IA64_SC_FLAG_IN_SYSCALL_BIT 1 /* did signal interrupt a syscall? */
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#define IA64_SC_FLAG_FPH_VALID_BIT 2 /* is state in f[32]-f[127] valid? */
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#define IA64_SC_FLAG_ONSTACK (1 << IA64_SC_FLAG_ONSTACK_BIT)
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#define IA64_SC_FLAG_IN_SYSCALL (1 << IA64_SC_FLAG_IN_SYSCALL_BIT)
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#define IA64_SC_FLAG_FPH_VALID (1 << IA64_SC_FLAG_FPH_VALID_BIT)
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# ifndef __ASSEMBLY__
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/*
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* Note on handling of register backing store: sc_ar_bsp contains the address that would
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* be found in ar.bsp after executing a "cover" instruction the context in which the
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* signal was raised. If signal delivery required switching to an alternate signal stack
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* (sc_rbs_base is not NULL), the "dirty" partition (as it would exist after executing the
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* imaginary "cover" instruction) is backed by the *alternate* signal stack, not the
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* original one. In this case, sc_rbs_base contains the base address of the new register
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* backing store. The number of registers in the dirty partition can be calculated as:
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*
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* ndirty = ia64_rse_num_regs(sc_rbs_base, sc_rbs_base + (sc_loadrs >> 16))
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*
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*/
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struct sigcontext {
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unsigned long sc_flags; /* see manifest constants above */
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unsigned long sc_nat; /* bit i == 1 iff scratch reg gr[i] is a NaT */
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stack_t sc_stack; /* previously active stack */
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unsigned long sc_ip; /* instruction pointer */
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unsigned long sc_cfm; /* current frame marker */
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unsigned long sc_um; /* user mask bits */
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unsigned long sc_ar_rsc; /* register stack configuration register */
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unsigned long sc_ar_bsp; /* backing store pointer */
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unsigned long sc_ar_rnat; /* RSE NaT collection register */
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unsigned long sc_ar_ccv; /* compare and exchange compare value register */
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unsigned long sc_ar_unat; /* ar.unat of interrupted context */
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unsigned long sc_ar_fpsr; /* floating-point status register */
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unsigned long sc_ar_pfs; /* previous function state */
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unsigned long sc_ar_lc; /* loop count register */
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unsigned long sc_pr; /* predicate registers */
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unsigned long sc_br[8]; /* branch registers */
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/* Note: sc_gr[0] is used as the "uc_link" member of ucontext_t */
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unsigned long sc_gr[32]; /* general registers (static partition) */
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struct ia64_fpreg sc_fr[128]; /* floating-point registers */
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unsigned long sc_rbs_base; /* NULL or new base of sighandler's rbs */
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unsigned long sc_loadrs; /* see description above */
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unsigned long sc_ar25; /* cmp8xchg16 uses this */
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unsigned long sc_ar26; /* rsvd for scratch use */
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unsigned long sc_rsvd[12]; /* reserved for future use */
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/*
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* The mask must come last so we can increase _NSIG_WORDS
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* without breaking binary compatibility.
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*/
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sigset_t sc_mask; /* signal mask to restore after handler returns */
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};
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# endif /* __ASSEMBLY__ */
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#endif /* _ASM_IA64_SIGCONTEXT_H */
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