forked from luck/tmp_suning_uos_patched
ARM: imx: reorganize nand registration to use a struct
Addiontionally make the interrupt #defines match the base address defines MX.._NFC_BASE_ADDR. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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40e2eda921
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@ -25,8 +25,9 @@ extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst;
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#define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata)
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#define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata)
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extern const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst;
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#define imx21_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v1(MX21_NFC_BASE_ADDR, MX21_INT_NANDFC, pdata)
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imx_add_mxc_nand(&imx21_mxc_nand_data, pdata)
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extern const struct imx_spi_imx_data imx21_cspi_data[] __initconst;
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#define imx21_add_cspi(id, pdata) \
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@ -27,8 +27,9 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst;
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#define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata)
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#define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata)
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extern const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst;
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#define imx27_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v1(MX27_NFC_BASE_ADDR, MX27_INT_NANDFC, pdata)
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imx_add_mxc_nand(&imx27_mxc_nand_data, pdata)
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extern const struct imx_spi_imx_data imx27_cspi_data[] __initconst;
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#define imx27_add_cspi(id, pdata) \
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@ -34,8 +34,9 @@ extern const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst;
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#define imx25_add_imx_uart3(pdata) imx25_add_imx_uart(3, pdata)
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#define imx25_add_imx_uart4(pdata) imx25_add_imx_uart(4, pdata)
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extern const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst;
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#define imx25_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata)
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imx_add_mxc_nand(&imx25_mxc_nand_data, pdata)
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extern const struct imx_spi_imx_data imx25_spi_imx_data[] __initconst;
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#define imx25_add_spi_imx(id, pdata) \
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@ -29,8 +29,9 @@ extern const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst;
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#define imx31_add_imx_uart3(pdata) imx31_add_imx_uart(3, pdata)
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#define imx31_add_imx_uart4(pdata) imx31_add_imx_uart(4, pdata)
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extern const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst;
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#define imx31_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v1(MX31_NFC_BASE_ADDR, MX31_INT_NANDFC, pdata)
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imx_add_mxc_nand(&imx31_mxc_nand_data, pdata)
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extern const struct imx_spi_imx_data imx31_cspi_data[] __initconst;
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#define imx31_add_cspi(id, pdata) \
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@ -32,8 +32,9 @@ extern const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst;
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#define imx35_add_imx_uart1(pdata) imx35_add_imx_uart(1, pdata)
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#define imx35_add_imx_uart2(pdata) imx35_add_imx_uart(2, pdata)
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extern const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst;
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#define imx35_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v21(MX35_NFC_BASE_ADDR, MX35_INT_NANDFC, pdata)
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imx_add_mxc_nand(&imx35_mxc_nand_data, pdata)
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extern const struct imx_spi_imx_data imx35_cspi_data[] __initconst;
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#define imx35_add_cspi(id, pdata) \
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@ -7,38 +7,56 @@
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* Free Software Foundation.
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*/
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#include <asm/sizes.h>
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#include <mach/hardware.h>
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#include <mach/devices-common.h>
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static struct platform_device *__init imx_add_mxc_nand(resource_size_t iobase,
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int irq, const struct mxc_nand_platform_data *pdata,
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resource_size_t iosize)
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#define imx_mxc_nand_data_entry_single(soc, _size) \
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{ \
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.iobase = soc ## _NFC_BASE_ADDR, \
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.iosize = _size, \
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.irq = soc ## _INT_NFC \
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}
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#ifdef CONFIG_SOC_IMX21
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const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
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imx_mxc_nand_data_entry_single(MX21, SZ_4K);
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#endif /* ifdef CONFIG_SOC_IMX21 */
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#ifdef CONFIG_ARCH_MX25
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const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst =
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imx_mxc_nand_data_entry_single(MX25, SZ_8K);
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#endif /* ifdef CONFIG_ARCH_MX25 */
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#ifdef CONFIG_SOC_IMX27
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const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
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imx_mxc_nand_data_entry_single(MX27, SZ_4K);
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#endif /* ifdef CONFIG_SOC_IMX27 */
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#ifdef CONFIG_ARCH_MX31
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const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst =
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imx_mxc_nand_data_entry_single(MX31, SZ_4K);
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#endif
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#ifdef CONFIG_ARCH_MX35
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const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
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imx_mxc_nand_data_entry_single(MX35, SZ_8K);
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#endif
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struct platform_device *__init imx_add_mxc_nand(
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const struct imx_mxc_nand_data *data,
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const struct mxc_nand_platform_data *pdata)
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{
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static int id = 0;
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struct resource res[] = {
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{
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.start = iobase,
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.end = iobase + iosize - 1,
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.start = data->iobase,
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.end = data->iobase + data->iosize - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = irq,
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.end = irq,
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.start = data->irq,
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.end = data->irq,
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.flags = IORESOURCE_IRQ,
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},
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};
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return imx_add_platform_device("mxc_nand", id++, res, ARRAY_SIZE(res),
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return imx_add_platform_device("mxc_nand", 0, res, ARRAY_SIZE(res),
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pdata, sizeof(*pdata));
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}
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struct platform_device *__init imx_add_mxc_nand_v1(resource_size_t iobase,
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int irq, const struct mxc_nand_platform_data *pdata)
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{
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return imx_add_mxc_nand(iobase, irq, pdata, SZ_4K);
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}
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struct platform_device *__init imx_add_mxc_nand_v21(resource_size_t iobase,
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int irq, const struct mxc_nand_platform_data *pdata)
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{
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return imx_add_mxc_nand(iobase, irq, pdata, SZ_8K);
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}
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@ -70,10 +70,14 @@ struct platform_device *__init imx_add_imx_uart_1irq(
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const struct imxuart_platform_data *pdata);
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#include <mach/mxc_nand.h>
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struct platform_device *__init imx_add_mxc_nand_v1(resource_size_t iobase,
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int irq, const struct mxc_nand_platform_data *pdata);
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struct platform_device *__init imx_add_mxc_nand_v21(resource_size_t iobase,
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int irq, const struct mxc_nand_platform_data *pdata);
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struct imx_mxc_nand_data {
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resource_size_t iobase;
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resource_size_t iosize;
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resource_size_t irq;
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};
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struct platform_device *__init imx_add_mxc_nand(
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const struct imx_mxc_nand_data *data,
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const struct mxc_nand_platform_data *pdata);
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#include <mach/spi.h>
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struct imx_spi_imx_data {
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@ -120,7 +120,7 @@
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#define MX21_INT_GPT1 26
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#define MX21_INT_WDOG 27
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#define MX21_INT_PCMCIA 28
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#define MX21_INT_NANDFC 29
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#define MX21_INT_NFC 29
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#define MX21_INT_BMI 30
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#define MX21_INT_CSI 31
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#define MX21_INT_DMACH0 32
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@ -69,7 +69,7 @@
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#define MX25_INT_KPP 24
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#define MX25_INT_DRYICE 25
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#define MX25_INT_UART2 32
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#define MX25_INT_NANDFC 33
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#define MX25_INT_NFC 33
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#define MX25_INT_LCDC 39
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#define MX25_INT_UART5 40
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#define MX25_INT_CAN1 43
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@ -167,7 +167,7 @@ static inline void mx27_setup_weimcs(size_t cs,
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#define MX27_INT_GPT1 26
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#define MX27_INT_WDOG 27
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#define MX27_INT_PCMCIA 28
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#define MX27_INT_NANDFC 29
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#define MX27_INT_NFC 29
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#define MX27_INT_ATA 30
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#define MX27_INT_CSI 31
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#define MX27_INT_DMACH0 32
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@ -168,7 +168,7 @@ static inline void mx31_setup_weimcs(size_t cs,
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#define MX31_INT_POWER_FAIL 30
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#define MX31_INT_CCM_DVFS 31
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#define MX31_INT_UART2 32
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#define MX31_INT_NANDFC 33
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#define MX31_INT_NFC 33
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#define MX31_INT_SDMA 34
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#define MX31_INT_USB1 35
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#define MX31_INT_USB2 36
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@ -145,7 +145,7 @@
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#define MX35_INT_GPT 29
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#define MX35_INT_POWER_FAIL 30
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#define MX35_INT_UART2 32
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#define MX35_INT_NANDFC 33
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#define MX35_INT_NFC 33
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#define MX35_INT_SDMA 34
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#define MX35_INT_USBHS 35
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#define MX35_INT_USBOTG 37
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