forked from luck/tmp_suning_uos_patched
OMAP3: hwmod data: add system DMA
Add OMAP3 DMA hwmod data Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -52,6 +52,8 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod;
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static struct omap_hwmod omap3xxx_gpio5_hwmod;
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static struct omap_hwmod omap3xxx_gpio6_hwmod;
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static struct omap_hwmod omap3xxx_dma_system_hwmod;
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/* L3 -> L4_CORE interface */
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static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
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.master = &omap3xxx_l3_main_hwmod,
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@ -1090,6 +1092,98 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
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};
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/* dma_system -> L3 */
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static struct omap_hwmod_ocp_if omap3xxx_dma_system__l3 = {
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.master = &omap3xxx_dma_system_hwmod,
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.slave = &omap3xxx_l3_main_hwmod,
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.clk = "core_l3_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* dma attributes */
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static struct omap_dma_dev_attr dma_dev_attr = {
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.dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
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.lch_count = 32,
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};
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static struct omap_hwmod_class_sysconfig omap3xxx_dma_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x002c,
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.syss_offs = 0x0028,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
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SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap3xxx_dma_hwmod_class = {
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.name = "dma",
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.sysc = &omap3xxx_dma_sysc,
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};
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/* dma_system */
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static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = {
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{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
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{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
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{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
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{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
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};
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static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
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{
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.pa_start = 0x48056000,
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.pa_end = 0x4a0560ff,
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.flags = ADDR_TYPE_RT
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},
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};
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/* dma_system master ports */
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static struct omap_hwmod_ocp_if *omap3xxx_dma_system_masters[] = {
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&omap3xxx_dma_system__l3,
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};
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/* l4_cfg -> dma_system */
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &omap3xxx_dma_system_hwmod,
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.clk = "core_l4_ick",
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.addr = omap3xxx_dma_system_addrs,
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.addr_cnt = ARRAY_SIZE(omap3xxx_dma_system_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* dma_system slave ports */
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static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = {
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&omap3xxx_l4_core__dma_system,
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};
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static struct omap_hwmod omap3xxx_dma_system_hwmod = {
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.name = "dma",
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.class = &omap3xxx_dma_hwmod_class,
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.mpu_irqs = omap3xxx_dma_system_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs),
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.main_clk = "core_l3_ick",
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.prcm = {
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.omap2 = {
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.module_offs = CORE_MOD,
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_ST_SDMA_SHIFT,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT,
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},
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},
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.slaves = omap3xxx_dma_system_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3xxx_dma_system_slaves),
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.masters = omap3xxx_dma_system_masters,
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.masters_cnt = ARRAY_SIZE(omap3xxx_dma_system_masters),
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.dev_attr = &dma_dev_attr,
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
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.flags = HWMOD_NO_IDLEST,
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};
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static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
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&omap3xxx_l3_main_hwmod,
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&omap3xxx_l4_core_hwmod,
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@ -1113,6 +1207,9 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
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&omap3xxx_gpio4_hwmod,
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&omap3xxx_gpio5_hwmod,
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&omap3xxx_gpio6_hwmod,
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/* dma_system class*/
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&omap3xxx_dma_system_hwmod,
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NULL,
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};
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