forked from luck/tmp_suning_uos_patched
ARM: crypto: add NEON accelerated XOR implementation
Add a source file xor-neon.c (which is really just the reference C implementation passed through the GCC vectorizer) and hook it up to the XOR framework. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org>
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@ -7,7 +7,10 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/hardirq.h>
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#include <asm-generic/xor.h>
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#include <asm/hwcap.h>
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#include <asm/neon.h>
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#define __XOR(a1, a2) a1 ^= a2
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@ -138,4 +141,74 @@ static struct xor_block_template xor_block_arm4regs = {
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xor_speed(&xor_block_arm4regs); \
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xor_speed(&xor_block_8regs); \
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xor_speed(&xor_block_32regs); \
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NEON_TEMPLATES; \
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} while (0)
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#ifdef CONFIG_KERNEL_MODE_NEON
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extern struct xor_block_template const xor_block_neon_inner;
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static void
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xor_neon_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
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{
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if (in_interrupt()) {
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xor_arm4regs_2(bytes, p1, p2);
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} else {
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kernel_neon_begin();
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xor_block_neon_inner.do_2(bytes, p1, p2);
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kernel_neon_end();
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}
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}
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static void
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xor_neon_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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unsigned long *p3)
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{
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if (in_interrupt()) {
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xor_arm4regs_3(bytes, p1, p2, p3);
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} else {
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kernel_neon_begin();
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xor_block_neon_inner.do_3(bytes, p1, p2, p3);
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kernel_neon_end();
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}
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}
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static void
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xor_neon_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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unsigned long *p3, unsigned long *p4)
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{
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if (in_interrupt()) {
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xor_arm4regs_4(bytes, p1, p2, p3, p4);
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} else {
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kernel_neon_begin();
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xor_block_neon_inner.do_4(bytes, p1, p2, p3, p4);
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kernel_neon_end();
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}
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}
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static void
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xor_neon_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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unsigned long *p3, unsigned long *p4, unsigned long *p5)
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{
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if (in_interrupt()) {
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xor_arm4regs_5(bytes, p1, p2, p3, p4, p5);
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} else {
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kernel_neon_begin();
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xor_block_neon_inner.do_5(bytes, p1, p2, p3, p4, p5);
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kernel_neon_end();
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}
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}
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static struct xor_block_template xor_block_neon = {
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.name = "neon",
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.do_2 = xor_neon_2,
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.do_3 = xor_neon_3,
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.do_4 = xor_neon_4,
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.do_5 = xor_neon_5
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};
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#define NEON_TEMPLATES \
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do { if (cpu_has_neon()) xor_speed(&xor_block_neon); } while (0)
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#else
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#define NEON_TEMPLATES
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#endif
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@ -45,3 +45,9 @@ lib-$(CONFIG_ARCH_SHARK) += io-shark.o
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$(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
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$(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
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ifeq ($(CONFIG_KERNEL_MODE_NEON),y)
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NEON_FLAGS := -mfloat-abi=softfp -mfpu=neon
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CFLAGS_xor-neon.o += $(NEON_FLAGS)
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lib-$(CONFIG_XOR_BLOCKS) += xor-neon.o
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endif
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42
arch/arm/lib/xor-neon.c
Normal file
42
arch/arm/lib/xor-neon.c
Normal file
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@ -0,0 +1,42 @@
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/*
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* linux/arch/arm/lib/xor-neon.c
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*
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* Copyright (C) 2013 Linaro Ltd <ard.biesheuvel@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/raid/xor.h>
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#ifndef __ARM_NEON__
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#error You should compile this file with '-mfloat-abi=softfp -mfpu=neon'
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#endif
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/*
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* Pull in the reference implementations while instructing GCC (through
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* -ftree-vectorize) to attempt to exploit implicit parallelism and emit
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* NEON instructions.
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*/
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#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
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#pragma GCC optimize "tree-vectorize"
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#else
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/*
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* While older versions of GCC do not generate incorrect code, they fail to
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* recognize the parallel nature of these functions, and emit plain ARM code,
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* which is known to be slower than the optimized ARM code in asm-arm/xor.h.
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*/
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#warning This code requires at least version 4.6 of GCC
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#endif
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#pragma GCC diagnostic ignored "-Wunused-variable"
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#include <asm-generic/xor.h>
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struct xor_block_template const xor_block_neon_inner = {
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.name = "__inner_neon__",
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.do_2 = xor_8regs_2,
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.do_3 = xor_8regs_3,
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.do_4 = xor_8regs_4,
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.do_5 = xor_8regs_5,
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};
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