forked from luck/tmp_suning_uos_patched
[SCSI] qla2xxx: Updated the reset sequence for ISP82xx.
Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com> Signed-off-by: Madhuranath Iyengar <Madhu.Iyengar@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
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@ -1081,12 +1081,26 @@ qla82xx_pinit_from_rom(scsi_qla_host_t *vha)
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/* Halt all the indiviual PEGs and other blocks of the ISP */
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qla82xx_rom_lock(ha);
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/* mask all niu interrupts */
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/* disable all I2Q */
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qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0);
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qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0);
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qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0);
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qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0);
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qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0);
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qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0);
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/* disable all niu interrupts */
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qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff);
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/* disable xge rx/tx */
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qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00);
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/* disable xg1 rx/tx */
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qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00);
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/* disable sideband mac */
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qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00);
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/* disable ap0 mac */
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qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00);
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/* disable ap1 mac */
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qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00);
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/* halt sre */
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val = qla82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000);
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@ -1101,6 +1115,7 @@ qla82xx_pinit_from_rom(scsi_qla_host_t *vha)
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qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0);
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qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0);
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qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0);
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qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0);
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/* halt pegs */
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qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1);
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@ -1108,9 +1123,9 @@ qla82xx_pinit_from_rom(scsi_qla_host_t *vha)
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qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1);
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qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1);
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qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1);
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msleep(20);
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/* big hammer */
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msleep(1000);
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if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
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/* don't reset CAM block on reset */
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qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff);
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