forked from luck/tmp_suning_uos_patched
Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer fixes from Thomas Gleixner: "A few updates for timers & co: - prevent a livelock in the timekeeping code when debugging is enabled - prevent out of bounds access in the timekeeping debug code - various fixes in clocksource drivers - a new maintainers entry" * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/sun4i: Clear interrupts after stopping timer in probe function drivers/clocksource/pistachio: Fix memory corruption in init clocksource/drivers/timer-atmel-pit: Enable mck clock clocksource/drivers/pxa: Fix include files for compilation MAINTAINERS: Add ARM ARCHITECTED TIMER entry timekeeping: Cap array access in timekeeping_debug timekeeping: Avoid taking lock in NMI path with CONFIG_DEBUG_TIMEKEEPING
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commit
037d2405d0
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@ -881,6 +881,15 @@ S: Supported
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F: drivers/gpu/drm/arc/
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F: Documentation/devicetree/bindings/display/snps,arcpgu.txt
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ARM ARCHITECTED TIMER DRIVER
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M: Mark Rutland <mark.rutland@arm.com>
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M: Marc Zyngier <marc.zyngier@arm.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: arch/arm/include/asm/arch_timer.h
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F: arch/arm64/include/asm/arch_timer.h
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F: drivers/clocksource/arm_arch_timer.c
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ARM HDLCD DRM DRIVER
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M: Liviu Dudau <liviu.dudau@arm.com>
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S: Supported
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@ -21,6 +21,8 @@
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#include <linux/of_irq.h>
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#include <linux/sched_clock.h>
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#include <clocksource/pxa.h>
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#include <asm/div64.h>
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#define OSMR0 0x00 /* OS Timer 0 Match Register */
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@ -123,12 +123,16 @@ static struct clock_event_device sun4i_clockevent = {
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.set_next_event = sun4i_clkevt_next_event,
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};
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static void sun4i_timer_clear_interrupt(void)
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{
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writel(TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_ST_REG);
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}
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static irqreturn_t sun4i_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = (struct clock_event_device *)dev_id;
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writel(0x1, timer_base + TIMER_IRQ_ST_REG);
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sun4i_timer_clear_interrupt();
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evt->event_handler(evt);
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return IRQ_HANDLED;
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@ -208,6 +212,9 @@ static int __init sun4i_timer_init(struct device_node *node)
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/* Make sure timer is stopped before playing with interrupts */
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sun4i_clkevt_time_stop(0);
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/* clear timer0 interrupt */
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sun4i_timer_clear_interrupt();
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sun4i_clockevent.cpumask = cpu_possible_mask;
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sun4i_clockevent.irq = irq;
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@ -202,10 +202,10 @@ static int __init pistachio_clksrc_of_init(struct device_node *node)
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rate = clk_get_rate(fast_clk);
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/* Disable irq's for clocksource usage */
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gpt_writel(&pcs_gpt.base, 0, TIMER_IRQ_MASK, 0);
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gpt_writel(&pcs_gpt.base, 0, TIMER_IRQ_MASK, 1);
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gpt_writel(&pcs_gpt.base, 0, TIMER_IRQ_MASK, 2);
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gpt_writel(&pcs_gpt.base, 0, TIMER_IRQ_MASK, 3);
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gpt_writel(pcs_gpt.base, 0, TIMER_IRQ_MASK, 0);
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gpt_writel(pcs_gpt.base, 0, TIMER_IRQ_MASK, 1);
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gpt_writel(pcs_gpt.base, 0, TIMER_IRQ_MASK, 2);
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gpt_writel(pcs_gpt.base, 0, TIMER_IRQ_MASK, 3);
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/* Enable timer block */
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writel(TIMER_ME_GLOBAL, pcs_gpt.base);
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@ -261,6 +261,12 @@ static int __init at91sam926x_pit_dt_init(struct device_node *node)
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return PTR_ERR(data->mck);
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}
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ret = clk_prepare_enable(data->mck);
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if (ret) {
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pr_err("Unable to enable mck\n");
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return ret;
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}
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/* Get the interrupts property */
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data->irq = irq_of_parse_and_map(node, 0);
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if (!data->irq) {
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@ -401,7 +401,10 @@ static __always_inline u64 __ktime_get_fast_ns(struct tk_fast *tkf)
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do {
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seq = raw_read_seqcount_latch(&tkf->seq);
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tkr = tkf->base + (seq & 0x01);
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now = ktime_to_ns(tkr->base) + timekeeping_get_ns(tkr);
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now = ktime_to_ns(tkr->base);
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now += clocksource_delta(tkr->read(tkr->clock),
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tkr->cycle_last, tkr->mask);
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} while (read_seqcount_retry(&tkf->seq, seq));
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return now;
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@ -23,7 +23,9 @@
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#include "timekeeping_internal.h"
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static unsigned int sleep_time_bin[32] = {0};
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#define NUM_BINS 32
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static unsigned int sleep_time_bin[NUM_BINS] = {0};
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static int tk_debug_show_sleep_time(struct seq_file *s, void *data)
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{
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@ -69,6 +71,9 @@ late_initcall(tk_debug_sleep_time_init);
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void tk_debug_account_sleep_time(struct timespec64 *t)
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{
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sleep_time_bin[fls(t->tv_sec)]++;
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/* Cap bin index so we don't overflow the array */
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int bin = min(fls(t->tv_sec), NUM_BINS-1);
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sleep_time_bin[bin]++;
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}
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