forked from luck/tmp_suning_uos_patched
x86/PCI: fix bogus host bridge window start/end alignment from _CRS
PCI device BARs are guaranteed to start and end on at least a four-byte (I/O) or a sixteen-byte (MMIO) boundary because they're aligned on their size and the low BAR bits are reserved. PCI-to-PCI bridge apertures have even larger alignment restrictions. However, some BIOSes (e.g., HP DL360 BIOS P31) report host bridge windows like "[io 0x0000-0x2cfe]". This is wrong because it excludes the last port at 0x2cff: it's impossible for a downstream device to claim 0x2cfe without also claiming 0x2cff. In fact, this BIOS configures a device behind the bridge to "[io 0x2c00-0x2cff]", so we know the window actually does include 0x2cff. This patch rounds the start and end of apertures to the appropriate boundary. I experimentally determined that Windows contains a similar workaround; details here: http://bugzilla.kernel.org/show_bug.cgi?id=14337 Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -59,6 +59,30 @@ bus_has_transparent_bridge(struct pci_bus *bus)
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return false;
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}
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static void
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align_resource(struct acpi_device *bridge, struct resource *res)
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{
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int align = (res->flags & IORESOURCE_MEM) ? 16 : 4;
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/*
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* Host bridge windows are not BARs, but the decoders on the PCI side
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* that claim this address space have starting alignment and length
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* constraints, so fix any obvious BIOS goofs.
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*/
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if (res->start & (align - 1)) {
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dev_printk(KERN_DEBUG, &bridge->dev,
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"host bridge window %pR invalid; "
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"aligning start to %d-byte boundary\n", res, align);
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res->start &= ~(align - 1);
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}
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if ((res->end + 1) & (align - 1)) {
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dev_printk(KERN_DEBUG, &bridge->dev,
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"host bridge window %pR invalid; "
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"aligning end to %d-byte boundary\n", res, align);
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res->end = roundup(res->end, align) - 1;
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}
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}
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static acpi_status
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setup_resource(struct acpi_resource *acpi_res, void *data)
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{
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@ -107,6 +131,7 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
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res->start = start;
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res->end = end;
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res->child = NULL;
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align_resource(info->bridge, res);
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if (!(pci_probe & PCI_USE__CRS)) {
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dev_printk(KERN_DEBUG, &info->bridge->dev,
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