forked from luck/tmp_suning_uos_patched
hwmon: (w83627ehf) Move fan pins check to a separate function
Move the check of fan pin usage to a separate function. This improves readability, and will make it easier to integrate chip-specific conditions. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
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@ -1844,13 +1844,78 @@ static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
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data->reg_temp_config[r2] = tmp;
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}
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static void __devinit
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w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
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struct w83627ehf_data *data)
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{
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int fan3pin, fan4pin, fan4min, fan5pin, regval;
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superio_enter(sio_data->sioreg);
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/* fan4 and fan5 share some pins with the GPIO and serial flash */
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if (sio_data->kind == nct6775) {
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/* On NCT6775, fan4 shares pins with the fdc interface */
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fan3pin = 1;
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fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
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fan4min = 0;
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fan5pin = 0;
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} else if (sio_data->kind == nct6776) {
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fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
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fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
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fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
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fan4min = fan4pin;
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} else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
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fan3pin = 1;
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fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
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fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
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fan4min = fan4pin;
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} else {
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fan3pin = 1;
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fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
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fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
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fan4min = fan4pin;
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}
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superio_exit(sio_data->sioreg);
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data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
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data->has_fan |= (fan3pin << 2);
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data->has_fan_min |= (fan3pin << 2);
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if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
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/*
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* NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1
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* register
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*/
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data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
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data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
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} else {
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/*
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* It looks like fan4 and fan5 pins can be alternatively used
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* as fan on/off switches, but fan5 control is write only :/
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* We assume that if the serial interface is disabled, designers
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* connected fan5 as input unless they are emitting log 1, which
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* is not the default.
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*/
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regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
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if ((regval & (1 << 2)) && fan4pin) {
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data->has_fan |= (1 << 3);
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data->has_fan_min |= (1 << 3);
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}
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if (!(regval & (1 << 1)) && fan5pin) {
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data->has_fan |= (1 << 4);
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data->has_fan_min |= (1 << 4);
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}
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}
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}
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static int __devinit w83627ehf_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct w83627ehf_sio_data *sio_data = dev->platform_data;
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struct w83627ehf_data *data;
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struct resource *res;
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u8 fan3pin, fan4pin, fan4min, fan5pin, en_vrm10;
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u8 en_vrm10;
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int i, err = 0;
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res = platform_get_resource(pdev, IORESOURCE_IO, 0);
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@ -2135,30 +2200,6 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev)
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}
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}
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/* fan4 and fan5 share some pins with the GPIO and serial flash */
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if (sio_data->kind == nct6775) {
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/* On NCT6775, fan4 shares pins with the fdc interface */
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fan3pin = 1;
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fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
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fan4min = 0;
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fan5pin = 0;
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} else if (sio_data->kind == nct6776) {
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fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
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fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
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fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
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fan4min = fan4pin;
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} else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
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fan3pin = 1;
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fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
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fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
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fan4min = fan4pin;
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} else {
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fan3pin = 1;
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fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
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fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
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fan4min = fan4pin;
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}
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if (fan_debounce &&
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(sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
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u8 tmp;
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@ -2176,34 +2217,7 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev)
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superio_exit(sio_data->sioreg);
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/* It looks like fan4 and fan5 pins can be alternatively used
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as fan on/off switches, but fan5 control is write only :/
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We assume that if the serial interface is disabled, designers
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connected fan5 as input unless they are emitting log 1, which
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is not the default. */
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data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
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data->has_fan |= (fan3pin << 2);
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data->has_fan_min |= (fan3pin << 2);
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/*
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* NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1 register
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*/
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if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
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data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
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data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
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} else {
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i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
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if ((i & (1 << 2)) && fan4pin) {
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data->has_fan |= (1 << 3);
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data->has_fan_min |= (1 << 3);
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}
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if (!(i & (1 << 1)) && fan5pin) {
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data->has_fan |= (1 << 4);
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data->has_fan_min |= (1 << 4);
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}
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}
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w83627ehf_check_fan_inputs(sio_data, data);
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/* Read fan clock dividers immediately */
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w83627ehf_update_fan_div_common(dev, data);
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