forked from luck/tmp_suning_uos_patched
net: phy: Add LED mode driver for Microsemi PHYs.
LED Mode: Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different status information that can be selected by setting LED mode. LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get from Device Tree. Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -27,6 +27,14 @@ Optional properties:
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'vddmac'.
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Default value is 0%.
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Ref: Table:1 - Edge rate change (below).
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- vsc8531,led-0-mode : LED mode. Specify how the LED[0] should behave.
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Allowed values are define in
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"include/dt-bindings/net/mscc-phy-vsc8531.h".
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Default value is VSC8531_LINK_1000_ACTIVITY (1).
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- vsc8531,led-1-mode : LED mode. Specify how the LED[1] should behave.
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Allowed values are define in
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"include/dt-bindings/net/mscc-phy-vsc8531.h".
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Default value is VSC8531_LINK_100_ACTIVITY (2).
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Table: 1 - Edge rate change
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----------------------------------------------------------------|
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@ -60,4 +68,6 @@ Example:
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compatible = "ethernet-phy-id0007.0570";
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vsc8531,vddmac = <3300>;
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vsc8531,edge-slowdown = <7>;
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vsc8531,led-0-mode = <LINK_1000_ACTIVITY>;
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vsc8531,led-1-mode = <LINK_100_ACTIVITY>;
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};
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@ -13,6 +13,7 @@
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#include <linux/phy.h>
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#include <linux/of.h>
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#include <linux/netdevice.h>
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#include <dt-bindings/net/mscc-phy-vsc8531.h>
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enum rgmii_rx_clock_delay {
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RGMII_RX_CLK_DELAY_0_2_NS = 0,
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@ -52,6 +53,11 @@ enum rgmii_rx_clock_delay {
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#define MSCC_PHY_DEV_AUX_CNTL 28
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#define HP_AUTO_MDIX_X_OVER_IND_MASK 0x2000
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#define MSCC_PHY_LED_MODE_SEL 29
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#define LED_1_MODE_SEL_MASK 0x00F0
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#define LED_0_MODE_SEL_MASK 0x000F
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#define LED_1_MODE_SEL_POS 4
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#define MSCC_EXT_PAGE_ACCESS 31
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#define MSCC_PHY_PAGE_STANDARD 0x0000 /* Standard registers */
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#define MSCC_PHY_PAGE_EXTENDED 0x0001 /* Extended registers */
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@ -99,6 +105,8 @@ enum rgmii_rx_clock_delay {
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struct vsc8531_private {
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int rate_magic;
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u8 led_0_mode;
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u8 led_1_mode;
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};
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#ifdef CONFIG_OF_MDIO
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@ -123,6 +131,29 @@ static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page)
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return rc;
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}
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static int vsc85xx_led_cntl_set(struct phy_device *phydev,
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u8 led_num,
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u8 mode)
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{
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int rc;
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u16 reg_val;
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mutex_lock(&phydev->lock);
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reg_val = phy_read(phydev, MSCC_PHY_LED_MODE_SEL);
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if (led_num) {
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reg_val &= ~LED_1_MODE_SEL_MASK;
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reg_val |= (((u16)mode << LED_1_MODE_SEL_POS) &
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LED_1_MODE_SEL_MASK);
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} else {
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reg_val &= ~LED_0_MODE_SEL_MASK;
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reg_val |= ((u16)mode & LED_0_MODE_SEL_MASK);
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}
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rc = phy_write(phydev, MSCC_PHY_LED_MODE_SEL, reg_val);
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mutex_unlock(&phydev->lock);
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return rc;
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}
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static int vsc85xx_mdix_get(struct phy_device *phydev, u8 *mdix)
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{
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u16 reg_val;
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@ -370,11 +401,41 @@ static int vsc85xx_edge_rate_magic_get(struct phy_device *phydev)
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return -EINVAL;
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}
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static int vsc85xx_dt_led_mode_get(struct phy_device *phydev,
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char *led,
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u8 default_mode)
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{
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struct device *dev = &phydev->mdio.dev;
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struct device_node *of_node = dev->of_node;
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u8 led_mode;
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int err;
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if (!of_node)
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return -ENODEV;
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led_mode = default_mode;
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err = of_property_read_u8(of_node, led, &led_mode);
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if (!err && (led_mode > 15 || led_mode == 7 || led_mode == 11)) {
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phydev_err(phydev, "DT %s invalid\n", led);
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return -EINVAL;
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}
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return led_mode;
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}
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#else
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static int vsc85xx_edge_rate_magic_get(struct phy_device *phydev)
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{
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return 0;
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}
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static int vsc85xx_dt_led_mode_get(struct phy_device *phydev,
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char *led,
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u8 default_mode)
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{
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return default_mode;
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}
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#endif /* CONFIG_OF_MDIO */
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static int vsc85xx_edge_rate_cntl_set(struct phy_device *phydev, u8 edge_rate)
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@ -499,6 +560,14 @@ static int vsc85xx_config_init(struct phy_device *phydev)
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if (rc)
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return rc;
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rc = vsc85xx_led_cntl_set(phydev, 1, vsc8531->led_1_mode);
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if (rc)
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return rc;
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rc = vsc85xx_led_cntl_set(phydev, 0, vsc8531->led_0_mode);
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if (rc)
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return rc;
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rc = genphy_config_init(phydev);
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return rc;
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@ -555,8 +624,9 @@ static int vsc85xx_read_status(struct phy_device *phydev)
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static int vsc85xx_probe(struct phy_device *phydev)
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{
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int rate_magic;
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struct vsc8531_private *vsc8531;
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int rate_magic;
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int led_mode;
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rate_magic = vsc85xx_edge_rate_magic_get(phydev);
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if (rate_magic < 0)
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@ -570,6 +640,19 @@ static int vsc85xx_probe(struct phy_device *phydev)
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vsc8531->rate_magic = rate_magic;
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/* LED[0] and LED[1] mode */
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led_mode = vsc85xx_dt_led_mode_get(phydev, "vsc8531,led-0-mode",
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VSC8531_LINK_1000_ACTIVITY);
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if (led_mode < 0)
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return led_mode;
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vsc8531->led_0_mode = led_mode;
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led_mode = vsc85xx_dt_led_mode_get(phydev, "vsc8531,led-1-mode",
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VSC8531_LINK_100_ACTIVITY);
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if (led_mode < 0)
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return led_mode;
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vsc8531->led_1_mode = led_mode;
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return 0;
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}
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29
include/dt-bindings/net/mscc-phy-vsc8531.h
Normal file
29
include/dt-bindings/net/mscc-phy-vsc8531.h
Normal file
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@ -0,0 +1,29 @@
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/*
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* Device Tree constants for Microsemi VSC8531 PHY
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*
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* Author: Nagaraju Lakkaraju
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*
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* License: Dual MIT/GPL
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* Copyright (c) 2017 Microsemi Corporation
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*/
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#ifndef _DT_BINDINGS_MSCC_VSC8531_H
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#define _DT_BINDINGS_MSCC_VSC8531_H
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/* PHY LED Modes */
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#define VSC8531_LINK_ACTIVITY 0
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#define VSC8531_LINK_1000_ACTIVITY 1
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#define VSC8531_LINK_100_ACTIVITY 2
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#define VSC8531_LINK_10_ACTIVITY 3
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#define VSC8531_LINK_100_1000_ACTIVITY 4
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#define VSC8531_LINK_10_1000_ACTIVITY 5
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#define VSC8531_LINK_10_100_ACTIVITY 6
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#define VSC8531_DUPLEX_COLLISION 8
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#define VSC8531_COLLISION 9
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#define VSC8531_ACTIVITY 10
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#define VSC8531_AUTONEG_FAULT 12
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#define VSC8531_SERIAL_MODE 13
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#define VSC8531_FORCE_LED_OFF 14
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#define VSC8531_FORCE_LED_ON 15
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#endif
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