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ARM: sun9i: Wrap the clock-indices

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Wrap the clock-indices to match the wrapping of the clock-output-names in
order to make it easier to match indices to names.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
This commit is contained in:
Maxime Ripard 2015-07-31 19:46:21 +02:00 committed by Stephen Boyd
parent c0a6e360a4
commit 06f282757a
1 changed files with 22 additions and 10 deletions
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32
arch/arm/boot/dts/sun9i-a80.dtsi
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@ -277,9 +277,12 @@ ahb0_gates: clk@06000580 {
compatible = "allwinner,sun9i-a80-ahb0-gates-clk";
reg = <0x06000580 0x4>;
clocks = <&ahb0>;
clock-indices = <0>, <1>, <3>, <5>, <8>, <12>, <13>,
<14>, <15>, <16>, <18>, <20>, <21>,
<22>, <23>;
clock-indices = <0>, <1>, <3>,
<5>, <8>, <12>,
<13>, <14>,
<15>, <16>, <18>,
<20>, <21>, <22>,
<23>;
clock-output-names = "ahb0_fd", "ahb0_ve", "ahb0_gpu",
"ahb0_ss", "ahb0_sd", "ahb0_nand1",
"ahb0_nand0", "ahb0_sdram",
@ -293,7 +296,10 @@ ahb1_gates: clk@06000584 {
compatible = "allwinner,sun9i-a80-ahb1-gates-clk";
reg = <0x06000584 0x4>;
clocks = <&ahb1>;
clock-indices = <0>, <1>, <17>, <21>, <22>, <23>, <24>;
clock-indices = <0>, <1>,
<17>, <21>,
<22>, <23>,
<24>;
clock-output-names = "ahb1_usbotg", "ahb1_usbhci",
"ahb1_gmac", "ahb1_msgbox",
"ahb1_spinlock", "ahb1_hstimer",
@ -305,8 +311,9 @@ ahb2_gates: clk@06000588 {
compatible = "allwinner,sun9i-a80-ahb2-gates-clk";
reg = <0x06000588 0x4>;
clocks = <&ahb2>;
clock-indices = <0>, <1>, <2>, <4>, <5>, <7>, <8>,
<11>;
clock-indices = <0>, <1>,
<2>, <4>, <5>,
<7>, <8>, <11>;
clock-output-names = "ahb2_lcd0", "ahb2_lcd1",
"ahb2_edp", "ahb2_csi", "ahb2_hdmi",
"ahb2_de", "ahb2_mp", "ahb2_mipi_dsi";
@ -317,8 +324,10 @@ apb0_gates: clk@06000590 {
compatible = "allwinner,sun9i-a80-apb0-gates-clk";
reg = <0x06000590 0x4>;
clocks = <&apb0>;
clock-indices = <1>, <5>, <11>, <12>, <13>, <15>,
<17>, <18>, <19>;
clock-indices = <1>, <5>,
<11>, <12>, <13>,
<15>, <17>, <18>,
<19>;
clock-output-names = "apb0_spdif", "apb0_pio",
"apb0_ac97", "apb0_i2s0", "apb0_i2s1",
"apb0_lradc", "apb0_gpadc", "apb0_twd",
@ -330,8 +339,11 @@ apb1_gates: clk@06000594 {
compatible = "allwinner,sun9i-a80-apb1-gates-clk";
reg = <0x06000594 0x4>;
clocks = <&apb1>;
clock-indices = <0>, <1>, <2>, <3>, <4>,
<16>, <17>, <18>, <19>, <20>, <21>;
clock-indices = <0>, <1>,
<2>, <3>, <4>,
<16>, <17>,
<18>, <19>,
<20>, <21>;
clock-output-names = "apb1_i2c0", "apb1_i2c1",
"apb1_i2c2", "apb1_i2c3", "apb1_i2c4",
"apb1_uart0", "apb1_uart1",