forked from luck/tmp_suning_uos_patched
MIPS: Octeon: Delete unused cvmx_helper_board_link_set_phy.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14204/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Aaro Koskinen
Ralf Baechle
parent
80c73b3509
commit
0a1e192d66
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@ -417,176 +417,6 @@ cvmx_helper_link_info_t __cvmx_helper_board_link_get(int ipd_port)
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return result;
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}
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/**
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* This function as a board specific method of changing the PHY
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* speed, duplex, and auto-negotiation. This programs the PHY and
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* not Octeon. This can be used to force Octeon's links to
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* specific settings.
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*
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* @phy_addr: The address of the PHY to program
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* @enable_autoneg:
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* Non zero if you want to enable auto-negotiation.
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* @link_info: Link speed to program. If the speed is zero and auto-negotiation
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* is enabled, all possible negotiation speeds are advertised.
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*
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* Returns Zero on success, negative on failure
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*/
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int cvmx_helper_board_link_set_phy(int phy_addr,
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cvmx_helper_board_set_phy_link_flags_types_t
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link_flags,
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cvmx_helper_link_info_t link_info)
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{
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/* Set the flow control settings based on link_flags */
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if ((link_flags & set_phy_link_flags_flow_control_mask) !=
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set_phy_link_flags_flow_control_dont_touch) {
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cvmx_mdio_phy_reg_autoneg_adver_t reg_autoneg_adver;
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reg_autoneg_adver.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_AUTONEG_ADVER);
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reg_autoneg_adver.s.asymmetric_pause =
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(link_flags & set_phy_link_flags_flow_control_mask) ==
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set_phy_link_flags_flow_control_enable;
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reg_autoneg_adver.s.pause =
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(link_flags & set_phy_link_flags_flow_control_mask) ==
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set_phy_link_flags_flow_control_enable;
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cvmx_mdio_write(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_AUTONEG_ADVER,
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reg_autoneg_adver.u16);
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}
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/* If speed isn't set and autoneg is on advertise all supported modes */
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if ((link_flags & set_phy_link_flags_autoneg)
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&& (link_info.s.speed == 0)) {
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cvmx_mdio_phy_reg_control_t reg_control;
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cvmx_mdio_phy_reg_status_t reg_status;
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cvmx_mdio_phy_reg_autoneg_adver_t reg_autoneg_adver;
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cvmx_mdio_phy_reg_extended_status_t reg_extended_status;
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cvmx_mdio_phy_reg_control_1000_t reg_control_1000;
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reg_status.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_STATUS);
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reg_autoneg_adver.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_AUTONEG_ADVER);
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reg_autoneg_adver.s.advert_100base_t4 =
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reg_status.s.capable_100base_t4;
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reg_autoneg_adver.s.advert_10base_tx_full =
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reg_status.s.capable_10_full;
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reg_autoneg_adver.s.advert_10base_tx_half =
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reg_status.s.capable_10_half;
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reg_autoneg_adver.s.advert_100base_tx_full =
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reg_status.s.capable_100base_x_full;
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reg_autoneg_adver.s.advert_100base_tx_half =
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reg_status.s.capable_100base_x_half;
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cvmx_mdio_write(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_AUTONEG_ADVER,
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reg_autoneg_adver.u16);
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if (reg_status.s.capable_extended_status) {
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reg_extended_status.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_EXTENDED_STATUS);
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reg_control_1000.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL_1000);
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reg_control_1000.s.advert_1000base_t_full =
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reg_extended_status.s.capable_1000base_t_full;
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reg_control_1000.s.advert_1000base_t_half =
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reg_extended_status.s.capable_1000base_t_half;
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cvmx_mdio_write(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL_1000,
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reg_control_1000.u16);
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}
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reg_control.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL);
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reg_control.s.autoneg_enable = 1;
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reg_control.s.restart_autoneg = 1;
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cvmx_mdio_write(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL, reg_control.u16);
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} else if ((link_flags & set_phy_link_flags_autoneg)) {
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cvmx_mdio_phy_reg_control_t reg_control;
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cvmx_mdio_phy_reg_status_t reg_status;
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cvmx_mdio_phy_reg_autoneg_adver_t reg_autoneg_adver;
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cvmx_mdio_phy_reg_control_1000_t reg_control_1000;
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reg_status.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_STATUS);
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reg_autoneg_adver.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_AUTONEG_ADVER);
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reg_autoneg_adver.s.advert_100base_t4 = 0;
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reg_autoneg_adver.s.advert_10base_tx_full = 0;
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reg_autoneg_adver.s.advert_10base_tx_half = 0;
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reg_autoneg_adver.s.advert_100base_tx_full = 0;
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reg_autoneg_adver.s.advert_100base_tx_half = 0;
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if (reg_status.s.capable_extended_status) {
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reg_control_1000.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL_1000);
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reg_control_1000.s.advert_1000base_t_full = 0;
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reg_control_1000.s.advert_1000base_t_half = 0;
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}
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switch (link_info.s.speed) {
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case 10:
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reg_autoneg_adver.s.advert_10base_tx_full =
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link_info.s.full_duplex;
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reg_autoneg_adver.s.advert_10base_tx_half =
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!link_info.s.full_duplex;
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break;
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case 100:
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reg_autoneg_adver.s.advert_100base_tx_full =
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link_info.s.full_duplex;
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reg_autoneg_adver.s.advert_100base_tx_half =
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!link_info.s.full_duplex;
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break;
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case 1000:
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reg_control_1000.s.advert_1000base_t_full =
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link_info.s.full_duplex;
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reg_control_1000.s.advert_1000base_t_half =
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!link_info.s.full_duplex;
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break;
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}
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cvmx_mdio_write(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_AUTONEG_ADVER,
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reg_autoneg_adver.u16);
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if (reg_status.s.capable_extended_status)
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cvmx_mdio_write(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL_1000,
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reg_control_1000.u16);
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reg_control.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL);
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reg_control.s.autoneg_enable = 1;
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reg_control.s.restart_autoneg = 1;
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cvmx_mdio_write(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL, reg_control.u16);
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} else {
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cvmx_mdio_phy_reg_control_t reg_control;
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reg_control.u16 =
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cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL);
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reg_control.s.autoneg_enable = 0;
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reg_control.s.restart_autoneg = 1;
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reg_control.s.duplex = link_info.s.full_duplex;
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if (link_info.s.speed == 1000) {
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reg_control.s.speed_msb = 1;
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reg_control.s.speed_lsb = 0;
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} else if (link_info.s.speed == 100) {
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reg_control.s.speed_msb = 0;
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reg_control.s.speed_lsb = 1;
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} else if (link_info.s.speed == 10) {
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reg_control.s.speed_msb = 0;
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reg_control.s.speed_lsb = 0;
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}
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cvmx_mdio_write(phy_addr >> 8, phy_addr & 0xff,
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CVMX_MDIO_PHY_REG_CONTROL, reg_control.u16);
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}
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return 0;
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}
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/**
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* This function is called by cvmx_helper_interface_probe() after it
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* determines the number of ports Octeon can support on a specific
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@ -75,26 +75,6 @@ typedef enum {
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*/
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extern int cvmx_helper_board_get_mii_address(int ipd_port);
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/**
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* This function as a board specific method of changing the PHY
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* speed, duplex, and autonegotiation. This programs the PHY and
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* not Octeon. This can be used to force Octeon's links to
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* specific settings.
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*
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* @phy_addr: The address of the PHY to program
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* @link_flags:
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* Flags to control autonegotiation. Bit 0 is autonegotiation
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* enable/disable to maintain backward compatibility.
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* @link_info: Link speed to program. If the speed is zero and autonegotiation
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* is enabled, all possible negotiation speeds are advertised.
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*
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* Returns Zero on success, negative on failure
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*/
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int cvmx_helper_board_link_set_phy(int phy_addr,
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cvmx_helper_board_set_phy_link_flags_types_t
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link_flags,
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cvmx_helper_link_info_t link_info);
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/**
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* This function is the board specific method of determining an
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* ethernet ports link speed. Most Octeon boards have Marvell PHYs
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