forked from luck/tmp_suning_uos_patched
net: ipa: zero return code before issuing generic EE command
Zero the result code stored in a field of the scratch 0 register before issuing a generic EE command. This just guarantees that the value we read later was actually written as a result of the command. Also add the definitions of two more possible result codes that can be returned when issuing flow control enable or disable commands: INCORRECT_CHANNEL_STATE: - channel must be in started state INCORRECT_DIRECTION - flow control is only valid for TX channels Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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0721999f15
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@ -1041,6 +1041,7 @@ static void gsi_isr_gp_int1(struct gsi *gsi)
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complete(&gsi->completion);
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}
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/* Inter-EE interrupt handler */
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static void gsi_isr_glob_ee(struct gsi *gsi)
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{
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@ -1493,6 +1494,12 @@ static int gsi_generic_command(struct gsi *gsi, u32 channel_id,
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struct completion *completion = &gsi->completion;
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u32 val;
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/* First zero the result code field */
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val = ioread32(gsi->virt + GSI_CNTXT_SCRATCH_0_OFFSET);
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val &= ~GENERIC_EE_RESULT_FMASK;
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iowrite32(val, gsi->virt + GSI_CNTXT_SCRATCH_0_OFFSET);
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/* Now issue the command */
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val = u32_encode_bits(opcode, GENERIC_OPCODE_FMASK);
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val |= u32_encode_bits(channel_id, GENERIC_CHID_FMASK);
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val |= u32_encode_bits(GSI_EE_MODEM, GENERIC_EE_FMASK);
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@ -410,6 +410,8 @@
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#define INTER_EE_RESULT_FMASK GENMASK(2, 0)
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#define GENERIC_EE_RESULT_FMASK GENMASK(7, 5)
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#define GENERIC_EE_SUCCESS_FVAL 1
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#define GENERIC_EE_INCORRECT_DIRECTION_FVAL 3
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#define GENERIC_EE_INCORRECT_CHANNEL_FVAL 5
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#define GENERIC_EE_NO_RESOURCES_FVAL 7
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#define USB_MAX_PACKET_FMASK GENMASK(15, 15) /* 0: HS; 1: SS */
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#define MHI_BASE_CHANNEL_FMASK GENMASK(31, 24)
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