forked from luck/tmp_suning_uos_patched
ASoC: imx-ssi.c: add new choices to platform configuration
* introduce 3 new flags to allow a more detailed configuration of the SSI link : IMX_SSI_NET : enable Network Mode IMX_SSI_SYN : enable Synchronous Mode IMX_SSI_USE_I2S_SLAVE : enable I2S Slave Mode * new platform can use these settings without breaking actual platforms. Signed-off-by: Eric Bénard <eric@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -10,6 +10,9 @@ struct imx_ssi_platform_data {
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unsigned int flags;
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#define IMX_SSI_DMA (1 << 0)
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#define IMX_SSI_USE_AC97 (1 << 1)
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#define IMX_SSI_NET (1 << 2)
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#define IMX_SSI_SYN (1 << 3)
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#define IMX_SSI_USE_I2S_SLAVE (1 << 4)
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void (*ac97_reset) (struct snd_ac97 *ac97);
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void (*ac97_warm_reset)(struct snd_ac97 *ac97);
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};
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@ -83,8 +83,6 @@ static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
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/*
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* SSI DAI format configuration.
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* Should only be called when port is inactive (i.e. SSIEN = 0).
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* Note: We don't use the I2S modes but instead manually configure the
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* SSI for I2S because the I2S mode is only a register preset.
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*/
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static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
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{
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@ -99,6 +97,10 @@ static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
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/* data on rising edge of bclk, frame low 1clk before data */
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strcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0;
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scr |= SSI_SCR_NET;
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if (ssi->flags & IMX_SSI_USE_I2S_SLAVE) {
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scr &= ~SSI_I2S_MODE_MASK;
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scr |= SSI_SCR_I2S_MODE_SLAVE;
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}
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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/* data on rising edge of bclk, frame high with data */
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@ -143,6 +145,11 @@ static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
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strcr |= SSI_STCR_TFEN0;
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if (ssi->flags & IMX_SSI_NET)
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scr |= SSI_SCR_NET;
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if (ssi->flags & IMX_SSI_SYN)
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scr |= SSI_SCR_SYN;
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writel(strcr, ssi->base + SSI_STCR);
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writel(strcr, ssi->base + SSI_SRCR);
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writel(scr, ssi->base + SSI_SCR);
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