forked from luck/tmp_suning_uos_patched
mfd: Add S5M core driver
S5M series are pmic including mutiple functional devices. It can support PMIC, RTC, Battery charger, codec. This patch implement core driver for s5m series. Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Sangbeom Kim
Samuel Ortiz
parent
5d26dc821a
commit
0f5f70783e
176
drivers/mfd/s5m-core.c
Normal file
176
drivers/mfd/s5m-core.c
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@ -0,0 +1,176 @@
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/*
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* s5m87xx.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/pm_runtime.h>
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#include <linux/mutex.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/s5m87xx/s5m-core.h>
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#include <linux/mfd/s5m87xx/s5m-pmic.h>
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#include <linux/mfd/s5m87xx/s5m-rtc.h>
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#include <linux/regmap.h>
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static struct mfd_cell s5m87xx_devs[] = {
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{
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.name = "s5m8767-pmic",
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}, {
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.name = "s5m-rtc",
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},
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};
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int s5m_reg_read(struct s5m87xx_dev *s5m87xx, u8 reg, void *dest)
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{
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return regmap_read(s5m87xx->regmap, reg, dest);
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}
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EXPORT_SYMBOL_GPL(s5m_reg_read);
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int s5m_bulk_read(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf)
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{
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return regmap_bulk_read(s5m87xx->regmap, reg, buf, count);;
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}
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EXPORT_SYMBOL_GPL(s5m_bulk_read);
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int s5m_reg_write(struct s5m87xx_dev *s5m87xx, u8 reg, u8 value)
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{
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return regmap_write(s5m87xx->regmap, reg, value);
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}
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EXPORT_SYMBOL_GPL(s5m_reg_write);
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int s5m_bulk_write(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf)
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{
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return regmap_raw_write(s5m87xx->regmap, reg, buf, count * sizeof(u16));
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}
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EXPORT_SYMBOL_GPL(s5m_bulk_write);
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int s5m_reg_update(struct s5m87xx_dev *s5m87xx, u8 reg, u8 val, u8 mask)
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{
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return regmap_update_bits(s5m87xx->regmap, reg, mask, val);
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}
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EXPORT_SYMBOL_GPL(s5m_reg_update);
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static struct regmap_config s5m_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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};
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static int s5m87xx_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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{
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struct s5m_platform_data *pdata = i2c->dev.platform_data;
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struct s5m87xx_dev *s5m87xx;
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int ret = 0;
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int error;
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s5m87xx = kzalloc(sizeof(struct s5m87xx_dev), GFP_KERNEL);
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if (s5m87xx == NULL)
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return -ENOMEM;
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i2c_set_clientdata(i2c, s5m87xx);
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s5m87xx->dev = &i2c->dev;
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s5m87xx->i2c = i2c;
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s5m87xx->irq = i2c->irq;
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s5m87xx->type = id->driver_data;
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if (pdata) {
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s5m87xx->device_type = pdata->device_type;
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s5m87xx->ono = pdata->ono;
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s5m87xx->irq_base = pdata->irq_base;
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s5m87xx->wakeup = pdata->wakeup;
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}
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s5m87xx->regmap = regmap_init_i2c(i2c, &s5m_regmap_config);
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if (IS_ERR(s5m87xx->regmap)) {
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error = PTR_ERR(s5m87xx->regmap);
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dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
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error);
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goto err;
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}
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s5m87xx->rtc = i2c_new_dummy(i2c->adapter, RTC_I2C_ADDR);
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i2c_set_clientdata(s5m87xx->rtc, s5m87xx);
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if (pdata->cfg_pmic_irq)
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pdata->cfg_pmic_irq();
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s5m_irq_init(s5m87xx);
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pm_runtime_set_active(s5m87xx->dev);
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ret = mfd_add_devices(s5m87xx->dev, -1,
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s5m87xx_devs, ARRAY_SIZE(s5m87xx_devs),
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NULL, 0);
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if (ret < 0)
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goto err;
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return ret;
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err:
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mfd_remove_devices(s5m87xx->dev);
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s5m_irq_exit(s5m87xx);
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i2c_unregister_device(s5m87xx->rtc);
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regmap_exit(s5m87xx->regmap);
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kfree(s5m87xx);
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return ret;
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}
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static int s5m87xx_i2c_remove(struct i2c_client *i2c)
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{
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struct s5m87xx_dev *s5m87xx = i2c_get_clientdata(i2c);
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mfd_remove_devices(s5m87xx->dev);
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s5m_irq_exit(s5m87xx);
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i2c_unregister_device(s5m87xx->rtc);
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regmap_exit(s5m87xx->regmap);
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kfree(s5m87xx);
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return 0;
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}
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static const struct i2c_device_id s5m87xx_i2c_id[] = {
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{ "s5m87xx", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, s5m87xx_i2c_id);
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static struct i2c_driver s5m87xx_i2c_driver = {
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.driver = {
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.name = "s5m87xx",
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.owner = THIS_MODULE,
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},
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.probe = s5m87xx_i2c_probe,
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.remove = s5m87xx_i2c_remove,
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.id_table = s5m87xx_i2c_id,
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};
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static int __init s5m87xx_i2c_init(void)
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{
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return i2c_add_driver(&s5m87xx_i2c_driver);
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}
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subsys_initcall(s5m87xx_i2c_init);
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static void __exit s5m87xx_i2c_exit(void)
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{
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i2c_del_driver(&s5m87xx_i2c_driver);
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}
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module_exit(s5m87xx_i2c_exit);
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MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
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MODULE_DESCRIPTION("Core support for the S5M MFD");
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MODULE_LICENSE("GPL");
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373
include/linux/mfd/s5m87xx/s5m-core.h
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373
include/linux/mfd/s5m87xx/s5m-core.h
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@ -0,0 +1,373 @@
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/*
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* s5m-core.h
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __LINUX_MFD_S5M_CORE_H
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#define __LINUX_MFD_S5M_CORE_H
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#define NUM_IRQ_REGS 4
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enum s5m_device_type {
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S5M8751X,
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S5M8763X,
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S5M8767X,
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};
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/* S5M8767 registers */
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enum s5m8767_reg {
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S5M8767_REG_ID,
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S5M8767_REG_INT1,
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S5M8767_REG_INT2,
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S5M8767_REG_INT3,
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S5M8767_REG_INT1M,
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S5M8767_REG_INT2M,
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S5M8767_REG_INT3M,
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S5M8767_REG_STATUS1,
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S5M8767_REG_STATUS2,
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S5M8767_REG_STATUS3,
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S5M8767_REG_CTRL1,
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S5M8767_REG_CTRL2,
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S5M8767_REG_LOWBAT1,
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S5M8767_REG_LOWBAT2,
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S5M8767_REG_BUCHG,
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S5M8767_REG_DVSRAMP,
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S5M8767_REG_DVSTIMER2 = 0x10,
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S5M8767_REG_DVSTIMER3,
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S5M8767_REG_DVSTIMER4,
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S5M8767_REG_LDO1,
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S5M8767_REG_LDO2,
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S5M8767_REG_LDO3,
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S5M8767_REG_LDO4,
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S5M8767_REG_LDO5,
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S5M8767_REG_LDO6,
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S5M8767_REG_LDO7,
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S5M8767_REG_LDO8,
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S5M8767_REG_LDO9,
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S5M8767_REG_LDO10,
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S5M8767_REG_LDO11,
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S5M8767_REG_LDO12,
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S5M8767_REG_LDO13,
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S5M8767_REG_LDO14 = 0x20,
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S5M8767_REG_LDO15,
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S5M8767_REG_LDO16,
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S5M8767_REG_LDO17,
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S5M8767_REG_LDO18,
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S5M8767_REG_LDO19,
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S5M8767_REG_LDO20,
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S5M8767_REG_LDO21,
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S5M8767_REG_LDO22,
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S5M8767_REG_LDO23,
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S5M8767_REG_LDO24,
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S5M8767_REG_LDO25,
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S5M8767_REG_LDO26,
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S5M8767_REG_LDO27,
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S5M8767_REG_LDO28,
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S5M8767_REG_UVLO = 0x31,
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S5M8767_REG_BUCK1CTRL1,
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S5M8767_REG_BUCK1CTRL2,
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S5M8767_REG_BUCK2CTRL,
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S5M8767_REG_BUCK2DVS1,
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S5M8767_REG_BUCK2DVS2,
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S5M8767_REG_BUCK2DVS3,
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S5M8767_REG_BUCK2DVS4,
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S5M8767_REG_BUCK2DVS5,
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S5M8767_REG_BUCK2DVS6,
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S5M8767_REG_BUCK2DVS7,
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S5M8767_REG_BUCK2DVS8,
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S5M8767_REG_BUCK3CTRL,
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S5M8767_REG_BUCK3DVS1,
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S5M8767_REG_BUCK3DVS2,
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S5M8767_REG_BUCK3DVS3,
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S5M8767_REG_BUCK3DVS4,
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S5M8767_REG_BUCK3DVS5,
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S5M8767_REG_BUCK3DVS6,
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S5M8767_REG_BUCK3DVS7,
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S5M8767_REG_BUCK3DVS8,
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S5M8767_REG_BUCK4CTRL,
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S5M8767_REG_BUCK4DVS1,
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S5M8767_REG_BUCK4DVS2,
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S5M8767_REG_BUCK4DVS3,
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S5M8767_REG_BUCK4DVS4,
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S5M8767_REG_BUCK4DVS5,
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S5M8767_REG_BUCK4DVS6,
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S5M8767_REG_BUCK4DVS7,
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S5M8767_REG_BUCK4DVS8,
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S5M8767_REG_BUCK5CTRL1,
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S5M8767_REG_BUCK5CTRL2,
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S5M8767_REG_BUCK5CTRL3,
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S5M8767_REG_BUCK5CTRL4,
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S5M8767_REG_BUCK5CTRL5,
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S5M8767_REG_BUCK6CTRL1,
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S5M8767_REG_BUCK6CTRL2,
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S5M8767_REG_BUCK7CTRL1,
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S5M8767_REG_BUCK7CTRL2,
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S5M8767_REG_BUCK8CTRL1,
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S5M8767_REG_BUCK8CTRL2,
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S5M8767_REG_BUCK9CTRL1,
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S5M8767_REG_BUCK9CTRL2,
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S5M8767_REG_LDO1CTRL,
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S5M8767_REG_LDO2_1CTRL,
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S5M8767_REG_LDO2_2CTRL,
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S5M8767_REG_LDO2_3CTRL,
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S5M8767_REG_LDO2_4CTRL,
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S5M8767_REG_LDO3CTRL,
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S5M8767_REG_LDO4CTRL,
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S5M8767_REG_LDO5CTRL,
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S5M8767_REG_LDO6CTRL,
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S5M8767_REG_LDO7CTRL,
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S5M8767_REG_LDO8CTRL,
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S5M8767_REG_LDO9CTRL,
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S5M8767_REG_LDO10CTRL,
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S5M8767_REG_LDO11CTRL,
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S5M8767_REG_LDO12CTRL,
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S5M8767_REG_LDO13CTRL,
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S5M8767_REG_LDO14CTRL,
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S5M8767_REG_LDO15CTRL,
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S5M8767_REG_LDO16CTRL,
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S5M8767_REG_LDO17CTRL,
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S5M8767_REG_LDO18CTRL,
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S5M8767_REG_LDO19CTRL,
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S5M8767_REG_LDO20CTRL,
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S5M8767_REG_LDO21CTRL,
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S5M8767_REG_LDO22CTRL,
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S5M8767_REG_LDO23CTRL,
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S5M8767_REG_LDO24CTRL,
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S5M8767_REG_LDO25CTRL,
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S5M8767_REG_LDO26CTRL,
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S5M8767_REG_LDO27CTRL,
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S5M8767_REG_LDO28CTRL,
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};
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/* S5M8763 registers */
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enum s5m8763_reg {
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S5M8763_REG_IRQ1,
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S5M8763_REG_IRQ2,
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S5M8763_REG_IRQ3,
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S5M8763_REG_IRQ4,
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S5M8763_REG_IRQM1,
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S5M8763_REG_IRQM2,
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S5M8763_REG_IRQM3,
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S5M8763_REG_IRQM4,
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S5M8763_REG_STATUS1,
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S5M8763_REG_STATUS2,
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S5M8763_REG_STATUSM1,
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S5M8763_REG_STATUSM2,
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S5M8763_REG_CHGR1,
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S5M8763_REG_CHGR2,
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S5M8763_REG_LDO_ACTIVE_DISCHARGE1,
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S5M8763_REG_LDO_ACTIVE_DISCHARGE2,
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S5M8763_REG_BUCK_ACTIVE_DISCHARGE3,
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S5M8763_REG_ONOFF1,
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S5M8763_REG_ONOFF2,
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S5M8763_REG_ONOFF3,
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S5M8763_REG_ONOFF4,
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S5M8763_REG_BUCK1_VOLTAGE1,
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S5M8763_REG_BUCK1_VOLTAGE2,
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S5M8763_REG_BUCK1_VOLTAGE3,
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S5M8763_REG_BUCK1_VOLTAGE4,
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S5M8763_REG_BUCK2_VOLTAGE1,
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S5M8763_REG_BUCK2_VOLTAGE2,
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S5M8763_REG_BUCK3,
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S5M8763_REG_BUCK4,
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S5M8763_REG_LDO1_LDO2,
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S5M8763_REG_LDO3,
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S5M8763_REG_LDO4,
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S5M8763_REG_LDO5,
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S5M8763_REG_LDO6,
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S5M8763_REG_LDO7,
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S5M8763_REG_LDO7_LDO8,
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S5M8763_REG_LDO9_LDO10,
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S5M8763_REG_LDO11,
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S5M8763_REG_LDO12,
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S5M8763_REG_LDO13,
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S5M8763_REG_LDO14,
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S5M8763_REG_LDO15,
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S5M8763_REG_LDO16,
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S5M8763_REG_BKCHR,
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S5M8763_REG_LBCNFG1,
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S5M8763_REG_LBCNFG2,
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};
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enum s5m8767_irq {
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S5M8767_IRQ_PWRR,
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S5M8767_IRQ_PWRF,
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S5M8767_IRQ_PWR1S,
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S5M8767_IRQ_JIGR,
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S5M8767_IRQ_JIGF,
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S5M8767_IRQ_LOWBAT2,
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S5M8767_IRQ_LOWBAT1,
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S5M8767_IRQ_MRB,
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S5M8767_IRQ_DVSOK2,
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S5M8767_IRQ_DVSOK3,
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S5M8767_IRQ_DVSOK4,
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S5M8767_IRQ_RTC60S,
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S5M8767_IRQ_RTCA1,
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S5M8767_IRQ_RTCA2,
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S5M8767_IRQ_SMPL,
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S5M8767_IRQ_RTC1S,
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S5M8767_IRQ_WTSR,
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||||
S5M8767_IRQ_NR,
|
||||
};
|
||||
|
||||
#define S5M8767_IRQ_PWRR_MASK (1 << 0)
|
||||
#define S5M8767_IRQ_PWRF_MASK (1 << 1)
|
||||
#define S5M8767_IRQ_PWR1S_MASK (1 << 3)
|
||||
#define S5M8767_IRQ_JIGR_MASK (1 << 4)
|
||||
#define S5M8767_IRQ_JIGF_MASK (1 << 5)
|
||||
#define S5M8767_IRQ_LOWBAT2_MASK (1 << 6)
|
||||
#define S5M8767_IRQ_LOWBAT1_MASK (1 << 7)
|
||||
|
||||
#define S5M8767_IRQ_MRB_MASK (1 << 2)
|
||||
#define S5M8767_IRQ_DVSOK2_MASK (1 << 3)
|
||||
#define S5M8767_IRQ_DVSOK3_MASK (1 << 4)
|
||||
#define S5M8767_IRQ_DVSOK4_MASK (1 << 5)
|
||||
|
||||
#define S5M8767_IRQ_RTC60S_MASK (1 << 0)
|
||||
#define S5M8767_IRQ_RTCA1_MASK (1 << 1)
|
||||
#define S5M8767_IRQ_RTCA2_MASK (1 << 2)
|
||||
#define S5M8767_IRQ_SMPL_MASK (1 << 3)
|
||||
#define S5M8767_IRQ_RTC1S_MASK (1 << 4)
|
||||
#define S5M8767_IRQ_WTSR_MASK (1 << 5)
|
||||
|
||||
enum s5m8763_irq {
|
||||
S5M8763_IRQ_DCINF,
|
||||
S5M8763_IRQ_DCINR,
|
||||
S5M8763_IRQ_JIGF,
|
||||
S5M8763_IRQ_JIGR,
|
||||
S5M8763_IRQ_PWRONF,
|
||||
S5M8763_IRQ_PWRONR,
|
||||
|
||||
S5M8763_IRQ_WTSREVNT,
|
||||
S5M8763_IRQ_SMPLEVNT,
|
||||
S5M8763_IRQ_ALARM1,
|
||||
S5M8763_IRQ_ALARM0,
|
||||
|
||||
S5M8763_IRQ_ONKEY1S,
|
||||
S5M8763_IRQ_TOPOFFR,
|
||||
S5M8763_IRQ_DCINOVPR,
|
||||
S5M8763_IRQ_CHGRSTF,
|
||||
S5M8763_IRQ_DONER,
|
||||
S5M8763_IRQ_CHGFAULT,
|
||||
|
||||
S5M8763_IRQ_LOBAT1,
|
||||
S5M8763_IRQ_LOBAT2,
|
||||
|
||||
S5M8763_IRQ_NR,
|
||||
};
|
||||
|
||||
#define S5M8763_IRQ_DCINF_MASK (1 << 2)
|
||||
#define S5M8763_IRQ_DCINR_MASK (1 << 3)
|
||||
#define S5M8763_IRQ_JIGF_MASK (1 << 4)
|
||||
#define S5M8763_IRQ_JIGR_MASK (1 << 5)
|
||||
#define S5M8763_IRQ_PWRONF_MASK (1 << 6)
|
||||
#define S5M8763_IRQ_PWRONR_MASK (1 << 7)
|
||||
|
||||
#define S5M8763_IRQ_WTSREVNT_MASK (1 << 0)
|
||||
#define S5M8763_IRQ_SMPLEVNT_MASK (1 << 1)
|
||||
#define S5M8763_IRQ_ALARM1_MASK (1 << 2)
|
||||
#define S5M8763_IRQ_ALARM0_MASK (1 << 3)
|
||||
|
||||
#define S5M8763_IRQ_ONKEY1S_MASK (1 << 0)
|
||||
#define S5M8763_IRQ_TOPOFFR_MASK (1 << 2)
|
||||
#define S5M8763_IRQ_DCINOVPR_MASK (1 << 3)
|
||||
#define S5M8763_IRQ_CHGRSTF_MASK (1 << 4)
|
||||
#define S5M8763_IRQ_DONER_MASK (1 << 5)
|
||||
#define S5M8763_IRQ_CHGFAULT_MASK (1 << 7)
|
||||
|
||||
#define S5M8763_IRQ_LOBAT1_MASK (1 << 0)
|
||||
#define S5M8763_IRQ_LOBAT2_MASK (1 << 1)
|
||||
|
||||
#define S5M8763_ENRAMP (1 << 4)
|
||||
|
||||
/**
|
||||
* struct s5m87xx_dev - s5m87xx master device for sub-drivers
|
||||
* @dev: master device of the chip (can be used to access platform data)
|
||||
* @i2c: i2c client private data for regulator
|
||||
* @rtc: i2c client private data for rtc
|
||||
* @iolock: mutex for serializing io access
|
||||
* @irqlock: mutex for buslock
|
||||
* @irq_base: base IRQ number for s5m87xx, required for IRQs
|
||||
* @irq: generic IRQ number for s5m87xx
|
||||
* @ono: power onoff IRQ number for s5m87xx
|
||||
* @irq_masks_cur: currently active value
|
||||
* @irq_masks_cache: cached hardware value
|
||||
* @type: indicate which s5m87xx "variant" is used
|
||||
*/
|
||||
struct s5m87xx_dev {
|
||||
struct device *dev;
|
||||
struct regmap *regmap;
|
||||
struct i2c_client *i2c;
|
||||
struct i2c_client *rtc;
|
||||
struct mutex iolock;
|
||||
struct mutex irqlock;
|
||||
|
||||
int device_type;
|
||||
int irq_base;
|
||||
int irq;
|
||||
int ono;
|
||||
u8 irq_masks_cur[NUM_IRQ_REGS];
|
||||
u8 irq_masks_cache[NUM_IRQ_REGS];
|
||||
int type;
|
||||
bool wakeup;
|
||||
};
|
||||
|
||||
int s5m_irq_init(struct s5m87xx_dev *s5m87xx);
|
||||
void s5m_irq_exit(struct s5m87xx_dev *s5m87xx);
|
||||
int s5m_irq_resume(struct s5m87xx_dev *s5m87xx);
|
||||
|
||||
extern int s5m_reg_read(struct s5m87xx_dev *s5m87xx, u8 reg, void *dest);
|
||||
extern int s5m_bulk_read(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf);
|
||||
extern int s5m_reg_write(struct s5m87xx_dev *s5m87xx, u8 reg, u8 value);
|
||||
extern int s5m_bulk_write(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf);
|
||||
extern int s5m_reg_update(struct s5m87xx_dev *s5m87xx, u8 reg, u8 val, u8 mask);
|
||||
|
||||
struct s5m_platform_data {
|
||||
struct s5m_regulator_data *regulators;
|
||||
int device_type;
|
||||
int num_regulators;
|
||||
|
||||
int irq_base;
|
||||
int (*cfg_pmic_irq)(void);
|
||||
|
||||
int ono;
|
||||
bool wakeup;
|
||||
bool buck_voltage_lock;
|
||||
|
||||
int buck_gpios[3];
|
||||
int buck2_voltage[8];
|
||||
bool buck2_gpiodvs;
|
||||
int buck3_voltage[8];
|
||||
bool buck3_gpiodvs;
|
||||
int buck4_voltage[8];
|
||||
bool buck4_gpiodvs;
|
||||
|
||||
int buck_set1;
|
||||
int buck_set2;
|
||||
int buck_set3;
|
||||
int buck2_enable;
|
||||
int buck3_enable;
|
||||
int buck4_enable;
|
||||
int buck_default_idx;
|
||||
int buck2_default_idx;
|
||||
int buck3_default_idx;
|
||||
int buck4_default_idx;
|
||||
|
||||
int buck_ramp_delay;
|
||||
bool buck2_ramp_enable;
|
||||
bool buck3_ramp_enable;
|
||||
bool buck4_ramp_enable;
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MFD_S5M_CORE_H */
|
||||
100
include/linux/mfd/s5m87xx/s5m-pmic.h
Normal file
100
include/linux/mfd/s5m87xx/s5m-pmic.h
Normal file
@ -0,0 +1,100 @@
|
||||
/* s5m87xx.h
|
||||
*
|
||||
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_MFD_S5M_PMIC_H
|
||||
#define __LINUX_MFD_S5M_PMIC_H
|
||||
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
/* S5M8767 regulator ids */
|
||||
enum s5m8767_regulators {
|
||||
S5M8767_LDO1,
|
||||
S5M8767_LDO2,
|
||||
S5M8767_LDO3,
|
||||
S5M8767_LDO4,
|
||||
S5M8767_LDO5,
|
||||
S5M8767_LDO6,
|
||||
S5M8767_LDO7,
|
||||
S5M8767_LDO8,
|
||||
S5M8767_LDO9,
|
||||
S5M8767_LDO10,
|
||||
S5M8767_LDO11,
|
||||
S5M8767_LDO12,
|
||||
S5M8767_LDO13,
|
||||
S5M8767_LDO14,
|
||||
S5M8767_LDO15,
|
||||
S5M8767_LDO16,
|
||||
S5M8767_LDO17,
|
||||
S5M8767_LDO18,
|
||||
S5M8767_LDO19,
|
||||
S5M8767_LDO20,
|
||||
S5M8767_LDO21,
|
||||
S5M8767_LDO22,
|
||||
S5M8767_LDO23,
|
||||
S5M8767_LDO24,
|
||||
S5M8767_LDO25,
|
||||
S5M8767_LDO26,
|
||||
S5M8767_LDO27,
|
||||
S5M8767_LDO28,
|
||||
S5M8767_BUCK1,
|
||||
S5M8767_BUCK2,
|
||||
S5M8767_BUCK3,
|
||||
S5M8767_BUCK4,
|
||||
S5M8767_BUCK5,
|
||||
S5M8767_BUCK6,
|
||||
S5M8767_BUCK7,
|
||||
S5M8767_BUCK8,
|
||||
S5M8767_BUCK9,
|
||||
S5M8767_AP_EN32KHZ,
|
||||
S5M8767_CP_EN32KHZ,
|
||||
|
||||
S5M8767_REG_MAX,
|
||||
};
|
||||
|
||||
/* S5M8763 regulator ids */
|
||||
enum s5m8763_regulators {
|
||||
S5M8763_LDO1,
|
||||
S5M8763_LDO2,
|
||||
S5M8763_LDO3,
|
||||
S5M8763_LDO4,
|
||||
S5M8763_LDO5,
|
||||
S5M8763_LDO6,
|
||||
S5M8763_LDO7,
|
||||
S5M8763_LDO8,
|
||||
S5M8763_LDO9,
|
||||
S5M8763_LDO10,
|
||||
S5M8763_LDO11,
|
||||
S5M8763_LDO12,
|
||||
S5M8763_LDO13,
|
||||
S5M8763_LDO14,
|
||||
S5M8763_LDO15,
|
||||
S5M8763_LDO16,
|
||||
S5M8763_BUCK1,
|
||||
S5M8763_BUCK2,
|
||||
S5M8763_BUCK3,
|
||||
S5M8763_BUCK4,
|
||||
S5M8763_AP_EN32KHZ,
|
||||
S5M8763_CP_EN32KHZ,
|
||||
S5M8763_ENCHGVI,
|
||||
S5M8763_ESAFEUSB1,
|
||||
S5M8763_ESAFEUSB2,
|
||||
};
|
||||
|
||||
/**
|
||||
* s5m87xx_regulator_data - regulator data
|
||||
* @id: regulator id
|
||||
* @initdata: regulator init data (contraints, supplies, ...)
|
||||
*/
|
||||
struct s5m_regulator_data {
|
||||
int id;
|
||||
struct regulator_init_data *initdata;
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MFD_S5M_PMIC_H */
|
||||
84
include/linux/mfd/s5m87xx/s5m-rtc.h
Normal file
84
include/linux/mfd/s5m87xx/s5m-rtc.h
Normal file
@ -0,0 +1,84 @@
|
||||
/*
|
||||
* s5m-rtc.h
|
||||
*
|
||||
* Copyright (c) 2011 Samsung Electronics Co., Ltd
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_MFD_S5M_RTC_H
|
||||
#define __LINUX_MFD_S5M_RTC_H
|
||||
|
||||
enum s5m87xx_rtc_reg {
|
||||
S5M87XX_RTC_SEC,
|
||||
S5M87XX_RTC_MIN,
|
||||
S5M87XX_RTC_HOUR,
|
||||
S5M87XX_RTC_WEEKDAY,
|
||||
S5M87XX_RTC_DATE,
|
||||
S5M87XX_RTC_MONTH,
|
||||
S5M87XX_RTC_YEAR1,
|
||||
S5M87XX_RTC_YEAR2,
|
||||
S5M87XX_ALARM0_SEC,
|
||||
S5M87XX_ALARM0_MIN,
|
||||
S5M87XX_ALARM0_HOUR,
|
||||
S5M87XX_ALARM0_WEEKDAY,
|
||||
S5M87XX_ALARM0_DATE,
|
||||
S5M87XX_ALARM0_MONTH,
|
||||
S5M87XX_ALARM0_YEAR1,
|
||||
S5M87XX_ALARM0_YEAR2,
|
||||
S5M87XX_ALARM1_SEC,
|
||||
S5M87XX_ALARM1_MIN,
|
||||
S5M87XX_ALARM1_HOUR,
|
||||
S5M87XX_ALARM1_WEEKDAY,
|
||||
S5M87XX_ALARM1_DATE,
|
||||
S5M87XX_ALARM1_MONTH,
|
||||
S5M87XX_ALARM1_YEAR1,
|
||||
S5M87XX_ALARM1_YEAR2,
|
||||
S5M87XX_ALARM0_CONF,
|
||||
S5M87XX_ALARM1_CONF,
|
||||
S5M87XX_RTC_STATUS,
|
||||
S5M87XX_WTSR_SMPL_CNTL,
|
||||
S5M87XX_RTC_UDR_CON,
|
||||
};
|
||||
|
||||
#define RTC_I2C_ADDR (0x0C >> 1)
|
||||
|
||||
#define HOUR_12 (1 << 7)
|
||||
#define HOUR_AMPM (1 << 6)
|
||||
#define HOUR_PM (1 << 5)
|
||||
#define ALARM0_STATUS (1 << 1)
|
||||
#define ALARM1_STATUS (1 << 2)
|
||||
#define UPDATE_AD (1 << 0)
|
||||
|
||||
/* RTC Control Register */
|
||||
#define BCD_EN_SHIFT 0
|
||||
#define BCD_EN_MASK (1 << BCD_EN_SHIFT)
|
||||
#define MODEL24_SHIFT 1
|
||||
#define MODEL24_MASK (1 << MODEL24_SHIFT)
|
||||
/* RTC Update Register1 */
|
||||
#define RTC_UDR_SHIFT 0
|
||||
#define RTC_UDR_MASK (1 << RTC_UDR_SHIFT)
|
||||
/* RTC Hour register */
|
||||
#define HOUR_PM_SHIFT 6
|
||||
#define HOUR_PM_MASK (1 << HOUR_PM_SHIFT)
|
||||
/* RTC Alarm Enable */
|
||||
#define ALARM_ENABLE_SHIFT 7
|
||||
#define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT)
|
||||
|
||||
enum {
|
||||
RTC_SEC = 0,
|
||||
RTC_MIN,
|
||||
RTC_HOUR,
|
||||
RTC_WEEKDAY,
|
||||
RTC_DATE,
|
||||
RTC_MONTH,
|
||||
RTC_YEAR1,
|
||||
RTC_YEAR2,
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MFD_S5M_RTC_H */
|
||||
Loading…
Reference in New Issue
Block a user