forked from luck/tmp_suning_uos_patched
perf/x86: Allow for architecture specific RDPMC indexes
Similar to config_base and event_base, allow architecture specific RDPMC ECX values. Signed-off-by: Jacob Shin <jacob.shin@amd.com> Acked-by: Stephane Eranian <eranian@google.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1360171589-6381-6-git-send-email-jacob.shin@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -829,7 +829,7 @@ static inline void x86_assign_hw_event(struct perf_event *event,
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} else {
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hwc->config_base = x86_pmu_config_addr(hwc->idx);
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hwc->event_base = x86_pmu_event_addr(hwc->idx);
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hwc->event_base_rdpmc = hwc->idx;
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hwc->event_base_rdpmc = x86_pmu_rdpmc_index(hwc->idx);
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}
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}
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@ -326,6 +326,7 @@ struct x86_pmu {
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unsigned eventsel;
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unsigned perfctr;
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int (*addr_offset)(int index, bool eventsel);
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int (*rdpmc_index)(int index);
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u64 (*event_map)(int);
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int max_events;
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int num_counters;
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@ -459,6 +460,11 @@ static inline unsigned int x86_pmu_event_addr(int index)
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x86_pmu.addr_offset(index, false) : index);
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}
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static inline int x86_pmu_rdpmc_index(int index)
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{
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return x86_pmu.rdpmc_index ? x86_pmu.rdpmc_index(index) : index;
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}
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int x86_setup_perfctr(struct perf_event *event);
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int x86_pmu_hw_config(struct perf_event *event);
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@ -173,6 +173,11 @@ static inline int amd_pmu_addr_offset(int index, bool eventsel)
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return offset;
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}
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static inline int amd_pmu_rdpmc_index(int index)
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{
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return index;
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}
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static int amd_pmu_hw_config(struct perf_event *event)
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{
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int ret;
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@ -620,6 +625,7 @@ static __initconst const struct x86_pmu amd_pmu = {
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.eventsel = MSR_K7_EVNTSEL0,
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.perfctr = MSR_K7_PERFCTR0,
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.addr_offset = amd_pmu_addr_offset,
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.rdpmc_index = amd_pmu_rdpmc_index,
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.event_map = amd_pmu_event_map,
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.max_events = ARRAY_SIZE(amd_perfmon_event_map),
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.num_counters = AMD64_NUM_COUNTERS,
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