forked from luck/tmp_suning_uos_patched
ARM: 6806/1: irq: introduce entry and exit functions for chained handlers
Some chained IRQ handlers are written to cope with primary chips of potentially different flow types. Whether this a sensible thing to do is a point of contention. This patch introduces entry/exit functions for chained handlers which infer the flow type of the primary chip as fasteoi or level-type by checking whether or not the ->irq_eoi function pointer is present and calling back to the primary chip as necessary. Other methods of flow control are not considered. Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -34,4 +34,35 @@ do { \
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raw_spin_unlock(&desc->lock); \
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} while(0)
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#ifndef __ASSEMBLY__
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/*
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* Entry/exit functions for chained handlers where the primary IRQ chip
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* may implement either fasteoi or level-trigger flow control.
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*/
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static inline void chained_irq_enter(struct irq_chip *chip,
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struct irq_desc *desc)
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{
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/* FastEOI controllers require no action on entry. */
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if (chip->irq_eoi)
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return;
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if (chip->irq_mask_ack) {
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chip->irq_mask_ack(&desc->irq_data);
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} else {
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chip->irq_mask(&desc->irq_data);
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if (chip->irq_ack)
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chip->irq_ack(&desc->irq_data);
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}
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}
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static inline void chained_irq_exit(struct irq_chip *chip,
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struct irq_desc *desc)
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{
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if (chip->irq_eoi)
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chip->irq_eoi(&desc->irq_data);
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else
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chip->irq_unmask(&desc->irq_data);
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}
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#endif
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#endif
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