forked from luck/tmp_suning_uos_patched
crypto: aesni-intel - Add AES-NI accelerated CTR mode
To take advantage of the hardware pipeline implementation of AES-NI instructions. CTR mode cryption is implemented in ASM to schedule multiple AES-NI instructions one after another. This way, some latency of AES-NI instruction can be eliminated. Performance testing based on dm-crypt should 50% reduction of ecryption/decryption time. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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269ab459da
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@ -32,6 +32,9 @@
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#define IN IN1
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#define KEY %xmm2
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#define IV %xmm3
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#define BSWAP_MASK %xmm10
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#define CTR %xmm11
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#define INC %xmm12
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#define KEYP %rdi
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#define OUTP %rsi
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@ -42,6 +45,7 @@
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#define T1 %r10
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#define TKEYP T1
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#define T2 %r11
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#define TCTR_LOW T2
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_key_expansion_128:
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_key_expansion_256a:
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@ -724,3 +728,114 @@ ENTRY(aesni_cbc_dec)
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movups IV, (IVP)
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.Lcbc_dec_just_ret:
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ret
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.align 16
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.Lbswap_mask:
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.byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
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/*
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* _aesni_inc_init: internal ABI
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* setup registers used by _aesni_inc
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* input:
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* IV
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* output:
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* CTR: == IV, in little endian
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* TCTR_LOW: == lower qword of CTR
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* INC: == 1, in little endian
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* BSWAP_MASK == endian swapping mask
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*/
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_aesni_inc_init:
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movaps .Lbswap_mask, BSWAP_MASK
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movaps IV, CTR
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PSHUFB_XMM BSWAP_MASK CTR
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mov $1, TCTR_LOW
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movq TCTR_LOW, INC
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movq CTR, TCTR_LOW
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ret
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/*
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* _aesni_inc: internal ABI
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* Increase IV by 1, IV is in big endian
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* input:
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* IV
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* CTR: == IV, in little endian
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* TCTR_LOW: == lower qword of CTR
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* INC: == 1, in little endian
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* BSWAP_MASK == endian swapping mask
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* output:
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* IV: Increase by 1
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* changed:
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* CTR: == output IV, in little endian
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* TCTR_LOW: == lower qword of CTR
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*/
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_aesni_inc:
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paddq INC, CTR
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add $1, TCTR_LOW
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jnc .Linc_low
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pslldq $8, INC
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paddq INC, CTR
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psrldq $8, INC
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.Linc_low:
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movaps CTR, IV
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PSHUFB_XMM BSWAP_MASK IV
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ret
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/*
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* void aesni_ctr_enc(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src,
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* size_t len, u8 *iv)
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*/
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ENTRY(aesni_ctr_enc)
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cmp $16, LEN
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jb .Lctr_enc_just_ret
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mov 480(KEYP), KLEN
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movups (IVP), IV
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call _aesni_inc_init
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cmp $64, LEN
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jb .Lctr_enc_loop1
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.align 4
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.Lctr_enc_loop4:
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movaps IV, STATE1
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call _aesni_inc
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movups (INP), IN1
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movaps IV, STATE2
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call _aesni_inc
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movups 0x10(INP), IN2
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movaps IV, STATE3
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call _aesni_inc
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movups 0x20(INP), IN3
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movaps IV, STATE4
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call _aesni_inc
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movups 0x30(INP), IN4
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call _aesni_enc4
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pxor IN1, STATE1
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movups STATE1, (OUTP)
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pxor IN2, STATE2
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movups STATE2, 0x10(OUTP)
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pxor IN3, STATE3
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movups STATE3, 0x20(OUTP)
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pxor IN4, STATE4
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movups STATE4, 0x30(OUTP)
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sub $64, LEN
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add $64, INP
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add $64, OUTP
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cmp $64, LEN
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jge .Lctr_enc_loop4
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cmp $16, LEN
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jb .Lctr_enc_ret
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.align 4
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.Lctr_enc_loop1:
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movaps IV, STATE
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call _aesni_inc
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movups (INP), IN
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call _aesni_enc1
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pxor IN, STATE
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movups STATE, (OUTP)
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sub $16, LEN
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add $16, INP
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add $16, OUTP
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cmp $16, LEN
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jge .Lctr_enc_loop1
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.Lctr_enc_ret:
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movups IV, (IVP)
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.Lctr_enc_just_ret:
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ret
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@ -18,6 +18,7 @@
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#include <crypto/algapi.h>
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#include <crypto/aes.h>
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#include <crypto/cryptd.h>
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#include <crypto/ctr.h>
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#include <asm/i387.h>
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#include <asm/aes.h>
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@ -58,6 +59,8 @@ asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in, unsigned int len, u8 *iv);
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asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in, unsigned int len, u8 *iv);
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asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in, unsigned int len, u8 *iv);
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static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
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{
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@ -321,6 +324,72 @@ static struct crypto_alg blk_cbc_alg = {
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},
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};
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static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
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struct blkcipher_walk *walk)
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{
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u8 *ctrblk = walk->iv;
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u8 keystream[AES_BLOCK_SIZE];
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u8 *src = walk->src.virt.addr;
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u8 *dst = walk->dst.virt.addr;
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unsigned int nbytes = walk->nbytes;
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aesni_enc(ctx, keystream, ctrblk);
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crypto_xor(keystream, src, nbytes);
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memcpy(dst, keystream, nbytes);
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crypto_inc(ctrblk, AES_BLOCK_SIZE);
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}
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static int ctr_crypt(struct blkcipher_desc *desc,
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struct scatterlist *dst, struct scatterlist *src,
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unsigned int nbytes)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
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struct blkcipher_walk walk;
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int err;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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kernel_fpu_begin();
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while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
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aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
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nbytes & AES_BLOCK_MASK, walk.iv);
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nbytes &= AES_BLOCK_SIZE - 1;
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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if (walk.nbytes) {
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ctr_crypt_final(ctx, &walk);
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err = blkcipher_walk_done(desc, &walk, 0);
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}
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kernel_fpu_end();
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return err;
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}
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static struct crypto_alg blk_ctr_alg = {
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.cra_name = "__ctr-aes-aesni",
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.cra_driver_name = "__driver-ctr-aes-aesni",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(blk_ctr_alg.cra_list),
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.cra_u = {
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.blkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.setkey = aes_set_key,
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.encrypt = ctr_crypt,
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.decrypt = ctr_crypt,
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},
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},
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};
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static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
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unsigned int key_len)
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{
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},
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};
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#ifdef HAS_CTR
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static int ablk_ctr_init(struct crypto_tfm *tfm)
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{
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struct cryptd_ablkcipher *cryptd_tfm;
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cryptd_tfm = cryptd_alloc_ablkcipher("fpu(ctr(__driver-aes-aesni))",
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0, 0);
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cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ctr-aes-aesni", 0, 0);
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if (IS_ERR(cryptd_tfm))
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return PTR_ERR(cryptd_tfm);
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ablk_init_common(tfm, cryptd_tfm);
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.ivsize = AES_BLOCK_SIZE,
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.setkey = ablk_set_key,
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.encrypt = ablk_encrypt,
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.decrypt = ablk_decrypt,
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.decrypt = ablk_encrypt,
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.geniv = "chainiv",
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},
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},
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};
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#ifdef HAS_CTR
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static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
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{
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struct cryptd_ablkcipher *cryptd_tfm;
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cryptd_tfm = cryptd_alloc_ablkcipher(
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"rfc3686(__driver-ctr-aes-aesni)", 0, 0);
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if (IS_ERR(cryptd_tfm))
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return PTR_ERR(cryptd_tfm);
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ablk_init_common(tfm, cryptd_tfm);
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return 0;
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}
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static struct crypto_alg ablk_rfc3686_ctr_alg = {
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.cra_name = "rfc3686(ctr(aes))",
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.cra_driver_name = "rfc3686-ctr-aes-aesni",
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.cra_priority = 400,
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct async_aes_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_ablkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(ablk_rfc3686_ctr_alg.cra_list),
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.cra_init = ablk_rfc3686_ctr_init,
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.cra_exit = ablk_exit,
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.cra_u = {
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.ablkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
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.ivsize = CTR_RFC3686_IV_SIZE,
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.setkey = ablk_set_key,
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.encrypt = ablk_encrypt,
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.decrypt = ablk_decrypt,
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.geniv = "seqiv",
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},
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},
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};
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#endif
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#ifdef HAS_LRW
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@ -640,13 +746,17 @@ static int __init aesni_init(void)
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goto blk_ecb_err;
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if ((err = crypto_register_alg(&blk_cbc_alg)))
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goto blk_cbc_err;
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if ((err = crypto_register_alg(&blk_ctr_alg)))
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goto blk_ctr_err;
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if ((err = crypto_register_alg(&ablk_ecb_alg)))
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goto ablk_ecb_err;
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if ((err = crypto_register_alg(&ablk_cbc_alg)))
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goto ablk_cbc_err;
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#ifdef HAS_CTR
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if ((err = crypto_register_alg(&ablk_ctr_alg)))
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goto ablk_ctr_err;
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#ifdef HAS_CTR
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if ((err = crypto_register_alg(&ablk_rfc3686_ctr_alg)))
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goto ablk_rfc3686_ctr_err;
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#endif
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#ifdef HAS_LRW
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if ((err = crypto_register_alg(&ablk_lrw_alg)))
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ablk_lrw_err:
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#endif
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#ifdef HAS_CTR
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crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
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ablk_rfc3686_ctr_err:
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#endif
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crypto_unregister_alg(&ablk_ctr_alg);
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ablk_ctr_err:
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#endif
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crypto_unregister_alg(&ablk_cbc_alg);
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ablk_cbc_err:
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crypto_unregister_alg(&ablk_ecb_alg);
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ablk_ecb_err:
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crypto_unregister_alg(&blk_ctr_alg);
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blk_ctr_err:
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crypto_unregister_alg(&blk_cbc_alg);
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blk_cbc_err:
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crypto_unregister_alg(&blk_ecb_alg);
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@ -705,10 +819,12 @@ static void __exit aesni_exit(void)
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crypto_unregister_alg(&ablk_lrw_alg);
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#endif
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#ifdef HAS_CTR
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crypto_unregister_alg(&ablk_ctr_alg);
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crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
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#endif
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crypto_unregister_alg(&ablk_ctr_alg);
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crypto_unregister_alg(&ablk_cbc_alg);
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crypto_unregister_alg(&ablk_ecb_alg);
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crypto_unregister_alg(&blk_ctr_alg);
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crypto_unregister_alg(&blk_cbc_alg);
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crypto_unregister_alg(&blk_ecb_alg);
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crypto_unregister_alg(&__aesni_alg);
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