forked from luck/tmp_suning_uos_patched
dmaengine: virt-dma: don't always free descriptor upon completion
This patch attempts to enhance the case of a transfer submitted multiple times, and where the cost of creating the descriptors chain is not negligible. This happens with big video buffers (several megabytes, ie. several thousands of linked descriptors in one scatter-gather list). In these cases, a video driver would want to do : - tx = dmaengine_prep_slave_sg() - dma_engine_submit(tx); - dma_async_issue_pending() - wait for video completion - read video data (or not, skipping a frame is also possible) - dma_engine_submit(tx) => here, the descriptors chain recalculation will take time => the dma coherent allocation over and over might create holes in the dma pool, which is counter-productive. - dma_async_issue_pending() - etc ... In order to cope with this case, virt-dma is modified to prevent freeing the descriptors upon completion if DMA_CTRL_REUSE flag is set in the transfer. This patch is a respin of the former DMA_CTRL_ACK approach, which was reverted due to a regression in audio drivers. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -29,7 +29,7 @@ dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *tx)
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spin_lock_irqsave(&vc->lock, flags);
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cookie = dma_cookie_assign(tx);
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list_add_tail(&vd->node, &vc->desc_submitted);
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list_move_tail(&vd->node, &vc->desc_submitted);
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spin_unlock_irqrestore(&vc->lock, flags);
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dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: submitted\n",
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@ -39,6 +39,33 @@ dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *tx)
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}
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EXPORT_SYMBOL_GPL(vchan_tx_submit);
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/**
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* vchan_tx_desc_free - free a reusable descriptor
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* @tx: the transfer
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*
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* This function frees a previously allocated reusable descriptor. The only
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* other way is to clear the DMA_CTRL_REUSE flag and submit one last time the
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* transfer.
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*
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* Returns 0 upon success
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*/
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int vchan_tx_desc_free(struct dma_async_tx_descriptor *tx)
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{
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struct virt_dma_chan *vc = to_virt_chan(tx->chan);
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struct virt_dma_desc *vd = to_virt_desc(tx);
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unsigned long flags;
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spin_lock_irqsave(&vc->lock, flags);
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list_del(&vd->node);
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spin_unlock_irqrestore(&vc->lock, flags);
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dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: freeing\n",
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vc, vd, vd->tx.cookie);
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vc->desc_free(vd);
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return 0;
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}
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EXPORT_SYMBOL_GPL(vchan_tx_desc_free);
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struct virt_dma_desc *vchan_find_desc(struct virt_dma_chan *vc,
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dma_cookie_t cookie)
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{
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@ -83,8 +110,10 @@ static void vchan_complete(unsigned long arg)
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cb_data = vd->tx.callback_param;
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list_del(&vd->node);
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vc->desc_free(vd);
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if (dmaengine_desc_test_reuse(&vd->tx))
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list_add(&vd->node, &vc->desc_allocated);
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else
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vc->desc_free(vd);
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if (cb)
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cb(cb_data);
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@ -96,9 +125,13 @@ void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head)
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while (!list_empty(head)) {
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struct virt_dma_desc *vd = list_first_entry(head,
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struct virt_dma_desc, node);
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list_del(&vd->node);
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dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd);
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vc->desc_free(vd);
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if (dmaengine_desc_test_reuse(&vd->tx)) {
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list_move_tail(&vd->node, &vc->desc_allocated);
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} else {
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dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd);
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list_del(&vd->node);
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vc->desc_free(vd);
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}
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}
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}
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EXPORT_SYMBOL_GPL(vchan_dma_desc_free_list);
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@ -108,6 +141,7 @@ void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev)
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dma_cookie_init(&vc->chan);
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spin_lock_init(&vc->lock);
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INIT_LIST_HEAD(&vc->desc_allocated);
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INIT_LIST_HEAD(&vc->desc_submitted);
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INIT_LIST_HEAD(&vc->desc_issued);
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INIT_LIST_HEAD(&vc->desc_completed);
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@ -29,6 +29,7 @@ struct virt_dma_chan {
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spinlock_t lock;
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/* protected by vc.lock */
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struct list_head desc_allocated;
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struct list_head desc_submitted;
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struct list_head desc_issued;
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struct list_head desc_completed;
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@ -55,10 +56,17 @@ static inline struct dma_async_tx_descriptor *vchan_tx_prep(struct virt_dma_chan
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struct virt_dma_desc *vd, unsigned long tx_flags)
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{
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extern dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *);
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extern int vchan_tx_desc_free(struct dma_async_tx_descriptor *);
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unsigned long flags;
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dma_async_tx_descriptor_init(&vd->tx, &vc->chan);
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vd->tx.flags = tx_flags;
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vd->tx.tx_submit = vchan_tx_submit;
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vd->tx.desc_free = vchan_tx_desc_free;
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spin_lock_irqsave(&vc->lock, flags);
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list_add_tail(&vd->node, &vc->desc_allocated);
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spin_unlock_irqrestore(&vc->lock, flags);
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return &vd->tx;
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}
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@ -134,6 +142,7 @@ static inline struct virt_dma_desc *vchan_next_desc(struct virt_dma_chan *vc)
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static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc,
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struct list_head *head)
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{
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list_splice_tail_init(&vc->desc_allocated, head);
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list_splice_tail_init(&vc->desc_submitted, head);
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list_splice_tail_init(&vc->desc_issued, head);
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list_splice_tail_init(&vc->desc_completed, head);
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@ -141,11 +150,14 @@ static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc,
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static inline void vchan_free_chan_resources(struct virt_dma_chan *vc)
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{
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struct virt_dma_desc *vd;
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unsigned long flags;
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LIST_HEAD(head);
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spin_lock_irqsave(&vc->lock, flags);
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vchan_get_all_descriptors(vc, &head);
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list_for_each_entry(vd, &head, node)
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dmaengine_desc_clear_reuse(&vd->tx);
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spin_unlock_irqrestore(&vc->lock, flags);
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vchan_dma_desc_free_list(vc, &head);
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