forked from luck/tmp_suning_uos_patched
rapidio/tsi721: add outbound windows mapping support
Add device-specific callback functions to support outbound windows mapping and release. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Aurelien Jacquiot <a-jacquiot@ti.com> Cc: Andre van Herk <andre.van.herk@prodrive-technologies.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Alexandre Bounine
Linus Torvalds
parent
93bdaca501
commit
1679e8dabf
@ -841,6 +841,169 @@ static void tsi721_free_irq(struct tsi721_device *priv)
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free_irq(priv->pdev->irq, (void *)priv);
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}
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static int
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tsi721_obw_alloc(struct tsi721_device *priv, struct tsi721_obw_bar *pbar,
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u32 size, int *win_id)
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{
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u64 win_base;
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u64 bar_base;
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u64 bar_end;
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u32 align;
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struct tsi721_ob_win *win;
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struct tsi721_ob_win *new_win = NULL;
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int new_win_idx = -1;
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int i = 0;
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bar_base = pbar->base;
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bar_end = bar_base + pbar->size;
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win_base = bar_base;
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align = size/TSI721_PC2SR_ZONES;
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while (i < TSI721_IBWIN_NUM) {
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for (i = 0; i < TSI721_IBWIN_NUM; i++) {
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if (!priv->ob_win[i].active) {
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if (new_win == NULL) {
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new_win = &priv->ob_win[i];
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new_win_idx = i;
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}
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continue;
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}
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/*
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* If this window belongs to the current BAR check it
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* for overlap
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*/
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win = &priv->ob_win[i];
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if (win->base >= bar_base && win->base < bar_end) {
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if (win_base < (win->base + win->size) &&
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(win_base + size) > win->base) {
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/* Overlap detected */
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win_base = win->base + win->size;
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win_base = ALIGN(win_base, align);
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break;
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}
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}
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}
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}
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if (win_base + size > bar_end)
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return -ENOMEM;
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if (!new_win) {
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dev_err(&priv->pdev->dev, "ERR: OBW count tracking failed\n");
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return -EIO;
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}
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new_win->active = true;
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new_win->base = win_base;
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new_win->size = size;
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new_win->pbar = pbar;
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priv->obwin_cnt--;
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pbar->free -= size;
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*win_id = new_win_idx;
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return 0;
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}
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static int tsi721_map_outb_win(struct rio_mport *mport, u16 destid, u64 rstart,
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u32 size, u32 flags, dma_addr_t *laddr)
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{
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struct tsi721_device *priv = mport->priv;
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int i;
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struct tsi721_obw_bar *pbar;
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struct tsi721_ob_win *ob_win;
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int obw = -1;
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u32 rval;
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u64 rio_addr;
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u32 zsize;
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int ret = -ENOMEM;
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if (!is_power_of_2(size) || (size < 0x8000) || (rstart & (size - 1)))
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return -EINVAL;
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if (priv->obwin_cnt == 0)
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return -EBUSY;
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for (i = 0; i < 2; i++) {
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if (priv->p2r_bar[i].free >= size) {
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pbar = &priv->p2r_bar[i];
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ret = tsi721_obw_alloc(priv, pbar, size, &obw);
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if (!ret)
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break;
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}
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}
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if (ret)
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return ret;
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WARN_ON(obw == -1);
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ob_win = &priv->ob_win[obw];
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ob_win->destid = destid;
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ob_win->rstart = rstart;
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/*
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* Configure Outbound Window
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*/
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zsize = size/TSI721_PC2SR_ZONES;
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rio_addr = rstart;
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/*
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* Program Address Translation Zones:
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* This implementation uses all 8 zones associated wit window.
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*/
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for (i = 0; i < TSI721_PC2SR_ZONES; i++) {
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while (ioread32(priv->regs + TSI721_ZONE_SEL) &
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TSI721_ZONE_SEL_GO) {
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udelay(1);
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}
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rval = (u32)(rio_addr & TSI721_LUT_DATA0_ADD) |
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TSI721_LUT_DATA0_NREAD | TSI721_LUT_DATA0_NWR;
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iowrite32(rval, priv->regs + TSI721_LUT_DATA0);
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rval = (u32)(rio_addr >> 32);
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iowrite32(rval, priv->regs + TSI721_LUT_DATA1);
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rval = destid;
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iowrite32(rval, priv->regs + TSI721_LUT_DATA2);
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rval = TSI721_ZONE_SEL_GO | (obw << 3) | i;
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iowrite32(rval, priv->regs + TSI721_ZONE_SEL);
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rio_addr += zsize;
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}
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iowrite32(TSI721_OBWIN_SIZE(size) << 8,
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priv->regs + TSI721_OBWINSZ(obw));
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iowrite32((u32)(ob_win->base >> 32), priv->regs + TSI721_OBWINUB(obw));
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iowrite32((u32)(ob_win->base & TSI721_OBWINLB_BA) | TSI721_OBWINLB_WEN,
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priv->regs + TSI721_OBWINLB(obw));
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*laddr = ob_win->base;
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return 0;
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}
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static void tsi721_unmap_outb_win(struct rio_mport *mport,
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u16 destid, u64 rstart)
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{
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struct tsi721_device *priv = mport->priv;
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struct tsi721_ob_win *ob_win;
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int i;
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for (i = 0; i < TSI721_OBWIN_NUM; i++) {
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ob_win = &priv->ob_win[i];
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if (ob_win->active &&
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ob_win->destid == destid && ob_win->rstart == rstart) {
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ob_win->active = false;
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iowrite32(0, priv->regs + TSI721_OBWINLB(i));
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ob_win->pbar->free += ob_win->size;
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priv->obwin_cnt++;
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break;
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}
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}
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}
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/**
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* tsi721_init_pc2sr_mapping - initializes outbound (PCIe->SRIO)
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* translation regions.
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@ -850,11 +1013,41 @@ static void tsi721_free_irq(struct tsi721_device *priv)
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*/
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static void tsi721_init_pc2sr_mapping(struct tsi721_device *priv)
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{
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int i;
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int i, z;
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u32 rval;
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/* Disable all PC2SR translation windows */
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for (i = 0; i < TSI721_OBWIN_NUM; i++)
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iowrite32(0, priv->regs + TSI721_OBWINLB(i));
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/* Initialize zone lookup tables to avoid ECC errors on reads */
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iowrite32(0, priv->regs + TSI721_LUT_DATA0);
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iowrite32(0, priv->regs + TSI721_LUT_DATA1);
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iowrite32(0, priv->regs + TSI721_LUT_DATA2);
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for (i = 0; i < TSI721_OBWIN_NUM; i++) {
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for (z = 0; z < TSI721_PC2SR_ZONES; z++) {
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while (ioread32(priv->regs + TSI721_ZONE_SEL) &
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TSI721_ZONE_SEL_GO) {
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udelay(1);
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}
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rval = TSI721_ZONE_SEL_GO | (i << 3) | z;
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iowrite32(rval, priv->regs + TSI721_ZONE_SEL);
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}
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}
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if (priv->p2r_bar[0].size == 0 && priv->p2r_bar[1].size == 0) {
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priv->obwin_cnt = 0;
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return;
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}
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priv->p2r_bar[0].free = priv->p2r_bar[0].size;
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priv->p2r_bar[1].free = priv->p2r_bar[1].size;
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for (i = 0; i < TSI721_OBWIN_NUM; i++)
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priv->ob_win[i].active = false;
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priv->obwin_cnt = TSI721_OBWIN_NUM;
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}
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/**
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@ -2418,6 +2611,8 @@ static struct rio_ops tsi721_rio_ops = {
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.unmap_inb = tsi721_rio_unmap_inb_mem,
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.pwenable = tsi721_pw_enable,
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.query_mport = tsi721_query_mport,
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.map_outb = tsi721_map_outb_win,
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.unmap_outb = tsi721_unmap_outb_win,
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};
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static void tsi721_mport_release(struct device *dev)
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@ -2573,14 +2768,27 @@ static int tsi721_probe(struct pci_dev *pdev,
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* It may be a good idea to keep them disabled using HW configuration
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* to save PCI memory space.
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*/
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if ((pci_resource_flags(pdev, BAR_2) & IORESOURCE_MEM) &&
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(pci_resource_flags(pdev, BAR_2) & IORESOURCE_MEM_64)) {
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dev_info(&pdev->dev, "Outbound BAR2 is not used but enabled.\n");
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priv->p2r_bar[0].size = priv->p2r_bar[1].size = 0;
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if (pci_resource_flags(pdev, BAR_2) & IORESOURCE_MEM_64) {
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if (pci_resource_flags(pdev, BAR_2) & IORESOURCE_PREFETCH)
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dev_info(&pdev->dev,
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"Prefetchable OBW BAR2 will not be used\n");
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else {
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priv->p2r_bar[0].base = pci_resource_start(pdev, BAR_2);
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priv->p2r_bar[0].size = pci_resource_len(pdev, BAR_2);
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}
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}
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if ((pci_resource_flags(pdev, BAR_4) & IORESOURCE_MEM) &&
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(pci_resource_flags(pdev, BAR_4) & IORESOURCE_MEM_64)) {
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dev_info(&pdev->dev, "Outbound BAR4 is not used but enabled.\n");
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if (pci_resource_flags(pdev, BAR_4) & IORESOURCE_MEM_64) {
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if (pci_resource_flags(pdev, BAR_4) & IORESOURCE_PREFETCH)
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dev_info(&pdev->dev,
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"Prefetchable OBW BAR4 will not be used\n");
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else {
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priv->p2r_bar[1].base = pci_resource_start(pdev, BAR_4);
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priv->p2r_bar[1].size = pci_resource_len(pdev, BAR_4);
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}
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}
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err = pci_request_regions(pdev, DRV_NAME);
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@ -822,6 +822,21 @@ struct tsi721_ib_win {
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struct list_head mappings;
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};
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struct tsi721_obw_bar {
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u64 base;
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u64 size;
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u64 free;
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};
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struct tsi721_ob_win {
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u64 base;
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u32 size;
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u16 destid;
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u64 rstart;
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bool active;
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struct tsi721_obw_bar *pbar;
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};
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struct tsi721_device {
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struct pci_dev *pdev;
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struct rio_mport mport;
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@ -861,6 +876,11 @@ struct tsi721_device {
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/* Inbound Mapping Windows */
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struct tsi721_ib_win ib_win[TSI721_IBWIN_NUM];
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int ibwin_cnt;
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/* Outbound Mapping Windows */
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struct tsi721_obw_bar p2r_bar[2];
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struct tsi721_ob_win ob_win[TSI721_OBWIN_NUM];
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int obwin_cnt;
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};
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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