forked from luck/tmp_suning_uos_patched
pwm: i.MX: factor out SoC specific functions
To cleanup the code and to make it easier to support different SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
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@ -46,79 +46,94 @@ struct imx_chip {
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void __iomem *mmio_base;
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struct pwm_chip chip;
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int (*config)(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns);
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};
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#define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
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static int imx_pwm_config_v1(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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/*
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* The PWM subsystem allows for exact frequencies. However,
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* I cannot connect a scope on my device to the PWM line and
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* thus cannot provide the program the PWM controller
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* exactly. Instead, I'm relying on the fact that the
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* Bootloader (u-boot or WinCE+haret) has programmed the PWM
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* function group already. So I'll just modify the PWM sample
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* register to follow the ratio of duty_ns vs. period_ns
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* accordingly.
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*
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* This is good enough for programming the brightness of
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* the LCD backlight.
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*
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* The real implementation would divide PERCLK[0] first by
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* both the prescaler (/1 .. /128) and then by CLKSEL
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* (/2 .. /16).
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*/
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u32 max = readl(imx->mmio_base + MX1_PWMP);
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u32 p = max * duty_ns / period_ns;
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writel(max - p, imx->mmio_base + MX1_PWMS);
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return 0;
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}
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static int imx_pwm_config_v2(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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unsigned long long c;
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unsigned long period_cycles, duty_cycles, prescale;
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u32 cr;
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c = clk_get_rate(imx->clk);
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c = c * period_ns;
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do_div(c, 1000000000);
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period_cycles = c;
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prescale = period_cycles / 0x10000 + 1;
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period_cycles /= prescale;
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c = (unsigned long long)period_cycles * duty_ns;
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do_div(c, period_ns);
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duty_cycles = c;
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/*
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* according to imx pwm RM, the real period value should be
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* PERIOD value in PWMPR plus 2.
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*/
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if (period_cycles > 2)
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period_cycles -= 2;
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else
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period_cycles = 0;
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writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
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writel(period_cycles, imx->mmio_base + MX3_PWMPR);
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cr = MX3_PWMCR_PRESCALER(prescale) |
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MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
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MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
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if (cpu_is_mx25())
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cr |= MX3_PWMCR_CLKSRC_IPG;
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else
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cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
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writel(cr, imx->mmio_base + MX3_PWMCR);
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return 0;
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}
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static int imx_pwm_config(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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if (!(cpu_is_mx1() || cpu_is_mx21())) {
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unsigned long long c;
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unsigned long period_cycles, duty_cycles, prescale;
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u32 cr;
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c = clk_get_rate(imx->clk);
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c = c * period_ns;
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do_div(c, 1000000000);
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period_cycles = c;
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prescale = period_cycles / 0x10000 + 1;
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period_cycles /= prescale;
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c = (unsigned long long)period_cycles * duty_ns;
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do_div(c, period_ns);
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duty_cycles = c;
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/*
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* according to imx pwm RM, the real period value should be
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* PERIOD value in PWMPR plus 2.
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*/
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if (period_cycles > 2)
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period_cycles -= 2;
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else
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period_cycles = 0;
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writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
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writel(period_cycles, imx->mmio_base + MX3_PWMPR);
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cr = MX3_PWMCR_PRESCALER(prescale) |
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MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
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MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
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if (cpu_is_mx25())
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cr |= MX3_PWMCR_CLKSRC_IPG;
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else
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cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
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writel(cr, imx->mmio_base + MX3_PWMCR);
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} else if (cpu_is_mx1() || cpu_is_mx21()) {
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/* The PWM subsystem allows for exact frequencies. However,
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* I cannot connect a scope on my device to the PWM line and
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* thus cannot provide the program the PWM controller
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* exactly. Instead, I'm relying on the fact that the
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* Bootloader (u-boot or WinCE+haret) has programmed the PWM
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* function group already. So I'll just modify the PWM sample
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* register to follow the ratio of duty_ns vs. period_ns
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* accordingly.
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*
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* This is good enough for programming the brightness of
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* the LCD backlight.
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*
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* The real implementation would divide PERCLK[0] first by
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* both the prescaler (/1 .. /128) and then by CLKSEL
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* (/2 .. /16).
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*/
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u32 max = readl(imx->mmio_base + MX1_PWMP);
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u32 p = max * duty_ns / period_ns;
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writel(max - p, imx->mmio_base + MX1_PWMS);
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} else {
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BUG();
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}
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return 0;
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return imx->config(chip, pwm, duty_ns, period_ns);
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}
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static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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@ -187,6 +202,11 @@ static int __devinit imx_pwm_probe(struct platform_device *pdev)
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if (imx->mmio_base == NULL)
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return -EADDRNOTAVAIL;
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if (cpu_is_mx1() || cpu_is_mx21())
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imx->config = imx_pwm_config_v1;
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else
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imx->config = imx_pwm_config_v2;
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ret = pwmchip_add(&imx->chip);
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if (ret < 0)
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return ret;
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