forked from luck/tmp_suning_uos_patched
[ARM] Convert AMBA PL010 driver to use 'uart_amba_port'
Use a pointer to struct uart_amba_port throughout the driver rather than a mixture of that and struct uart_port. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
Russell King
parent
7531a1c2c4
commit
1b0646a033
@ -77,73 +77,77 @@ struct uart_amba_port {
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static void pl010_stop_tx(struct uart_port *port)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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cr = readb(port->membase + UART010_CR);
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cr = readb(uap->port.membase + UART010_CR);
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cr &= ~UART010_CR_TIE;
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writel(cr, port->membase + UART010_CR);
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writel(cr, uap->port.membase + UART010_CR);
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}
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static void pl010_start_tx(struct uart_port *port)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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cr = readb(port->membase + UART010_CR);
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cr = readb(uap->port.membase + UART010_CR);
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cr |= UART010_CR_TIE;
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writel(cr, port->membase + UART010_CR);
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writel(cr, uap->port.membase + UART010_CR);
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}
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static void pl010_stop_rx(struct uart_port *port)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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cr = readb(port->membase + UART010_CR);
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cr = readb(uap->port.membase + UART010_CR);
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cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
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writel(cr, port->membase + UART010_CR);
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writel(cr, uap->port.membase + UART010_CR);
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}
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static void pl010_enable_ms(struct uart_port *port)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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cr = readb(port->membase + UART010_CR);
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cr = readb(uap->port.membase + UART010_CR);
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cr |= UART010_CR_MSIE;
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writel(cr, port->membase + UART010_CR);
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writel(cr, uap->port.membase + UART010_CR);
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}
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static void pl010_rx_chars(struct uart_port *port)
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static void pl010_rx_chars(struct uart_amba_port *uap)
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{
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struct tty_struct *tty = port->info->tty;
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struct tty_struct *tty = uap->port.info->tty;
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unsigned int status, ch, flag, rsr, max_count = 256;
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status = readb(port->membase + UART01x_FR);
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status = readb(uap->port.membase + UART01x_FR);
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while (UART_RX_DATA(status) && max_count--) {
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ch = readb(port->membase + UART01x_DR);
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ch = readb(uap->port.membase + UART01x_DR);
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flag = TTY_NORMAL;
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port->icount.rx++;
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uap->port.icount.rx++;
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/*
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* Note that the error handling code is
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* out of the main execution path
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*/
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rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
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rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
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if (unlikely(rsr & UART01x_RSR_ANY)) {
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writel(0, port->membase + UART01x_ECR);
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writel(0, uap->port.membase + UART01x_ECR);
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if (rsr & UART01x_RSR_BE) {
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rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
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port->icount.brk++;
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if (uart_handle_break(port))
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uap->port.icount.brk++;
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if (uart_handle_break(&uap->port))
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goto ignore_char;
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} else if (rsr & UART01x_RSR_PE)
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port->icount.parity++;
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uap->port.icount.parity++;
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else if (rsr & UART01x_RSR_FE)
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port->icount.frame++;
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uap->port.icount.frame++;
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if (rsr & UART01x_RSR_OE)
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port->icount.overrun++;
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uap->port.icount.overrun++;
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rsr &= port->read_status_mask;
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rsr &= uap->port.read_status_mask;
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if (rsr & UART01x_RSR_BE)
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flag = TTY_BREAK;
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@ -153,53 +157,52 @@ static void pl010_rx_chars(struct uart_port *port)
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flag = TTY_FRAME;
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}
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if (uart_handle_sysrq_char(port, ch))
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if (uart_handle_sysrq_char(&uap->port, ch))
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goto ignore_char;
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uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);
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uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
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ignore_char:
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status = readb(port->membase + UART01x_FR);
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status = readb(uap->port.membase + UART01x_FR);
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}
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tty_flip_buffer_push(tty);
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return;
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}
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static void pl010_tx_chars(struct uart_port *port)
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static void pl010_tx_chars(struct uart_amba_port *uap)
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{
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struct circ_buf *xmit = &port->info->xmit;
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struct circ_buf *xmit = &uap->port.info->xmit;
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int count;
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if (port->x_char) {
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writel(port->x_char, port->membase + UART01x_DR);
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port->icount.tx++;
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port->x_char = 0;
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if (uap->port.x_char) {
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writel(uap->port.x_char, uap->port.membase + UART01x_DR);
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uap->port.icount.tx++;
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uap->port.x_char = 0;
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return;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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pl010_stop_tx(port);
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if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
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pl010_stop_tx(&uap->port);
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return;
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}
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count = port->fifosize >> 1;
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count = uap->port.fifosize >> 1;
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do {
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writel(xmit->buf[xmit->tail], port->membase + UART01x_DR);
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writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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uap->port.icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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} while (--count > 0);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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uart_write_wakeup(&uap->port);
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if (uart_circ_empty(xmit))
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pl010_stop_tx(port);
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pl010_stop_tx(&uap->port);
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}
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static void pl010_modem_status(struct uart_port *port)
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static void pl010_modem_status(struct uart_amba_port *uap)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int status, delta;
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writel(0, uap->port.membase + UART010_ICR);
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@ -226,47 +229,50 @@ static void pl010_modem_status(struct uart_port *port)
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static irqreturn_t pl010_int(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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struct uart_amba_port *uap = dev_id;
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unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
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int handled = 0;
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spin_lock(&port->lock);
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spin_lock(&uap->port.lock);
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status = readb(port->membase + UART010_IIR);
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status = readb(uap->port.membase + UART010_IIR);
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if (status) {
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do {
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if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
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pl010_rx_chars(port);
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pl010_rx_chars(uap);
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if (status & UART010_IIR_MIS)
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pl010_modem_status(port);
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pl010_modem_status(uap);
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if (status & UART010_IIR_TIS)
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pl010_tx_chars(port);
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pl010_tx_chars(uap);
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if (pass_counter-- == 0)
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break;
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status = readb(port->membase + UART010_IIR);
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status = readb(uap->port.membase + UART010_IIR);
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} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
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UART010_IIR_TIS));
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handled = 1;
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}
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spin_unlock(&port->lock);
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spin_unlock(&uap->port.lock);
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return IRQ_RETVAL(handled);
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}
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static unsigned int pl010_tx_empty(struct uart_port *port)
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{
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return readb(port->membase + UART01x_FR) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int status = readb(uap->port.membase + UART01x_FR);
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return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
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}
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static unsigned int pl010_get_mctrl(struct uart_port *port)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int result = 0;
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unsigned int status;
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status = readb(port->membase + UART01x_FR);
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status = readb(uap->port.membase + UART01x_FR);
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if (status & UART01x_FR_DCD)
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result |= TIOCM_CAR;
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if (status & UART01x_FR_DSR)
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@ -287,17 +293,18 @@ static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
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static void pl010_break_ctl(struct uart_port *port, int break_state)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned long flags;
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unsigned int lcr_h;
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spin_lock_irqsave(&port->lock, flags);
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lcr_h = readb(port->membase + UART010_LCRH);
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spin_lock_irqsave(&uap->port.lock, flags);
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lcr_h = readb(uap->port.membase + UART010_LCRH);
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if (break_state == -1)
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lcr_h |= UART01x_LCRH_BRK;
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else
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lcr_h &= ~UART01x_LCRH_BRK;
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writel(lcr_h, port->membase + UART010_LCRH);
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spin_unlock_irqrestore(&port->lock, flags);
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writel(lcr_h, uap->port.membase + UART010_LCRH);
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spin_unlock_irqrestore(&uap->port.lock, flags);
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}
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static int pl010_startup(struct uart_port *port)
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@ -308,46 +315,49 @@ static int pl010_startup(struct uart_port *port)
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/*
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* Allocate the IRQ
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*/
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retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port);
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retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
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if (retval)
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return retval;
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/*
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* initialise the old status of the modem signals
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*/
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uap->old_status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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/*
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* Finally, enable interrupts
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*/
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writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
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port->membase + UART010_CR);
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uap->port.membase + UART010_CR);
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return 0;
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}
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static void pl010_shutdown(struct uart_port *port)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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/*
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* Free the interrupt
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*/
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free_irq(port->irq, port);
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free_irq(uap->port.irq, uap);
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/*
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* disable all interrupts, disable the port
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*/
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writel(0, port->membase + UART010_CR);
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writel(0, uap->port.membase + UART010_CR);
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/* disable break condition and fifos */
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writel(readb(port->membase + UART010_LCRH) &
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writel(readb(uap->port.membase + UART010_LCRH) &
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~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
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port->membase + UART010_LCRH);
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uap->port.membase + UART010_LCRH);
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}
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static void
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pl010_set_termios(struct uart_port *port, struct ktermios *termios,
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struct ktermios *old)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int lcr_h, old_cr;
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unsigned long flags;
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unsigned int baud, quot;
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@ -355,7 +365,7 @@ pl010_set_termios(struct uart_port *port, struct ktermios *termios,
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/*
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* Ask the core to calculate the divisor for us.
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*/
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
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quot = uart_get_divisor(port, baud);
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switch (termios->c_cflag & CSIZE) {
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@ -379,66 +389,66 @@ pl010_set_termios(struct uart_port *port, struct ktermios *termios,
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if (!(termios->c_cflag & PARODD))
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lcr_h |= UART01x_LCRH_EPS;
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}
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if (port->fifosize > 1)
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if (uap->port.fifosize > 1)
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lcr_h |= UART01x_LCRH_FEN;
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spin_lock_irqsave(&port->lock, flags);
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spin_lock_irqsave(&uap->port.lock, flags);
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/*
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* Update the per-port timeout.
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*/
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uart_update_timeout(port, termios->c_cflag, baud);
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port->read_status_mask = UART01x_RSR_OE;
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uap->port.read_status_mask = UART01x_RSR_OE;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
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uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
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if (termios->c_iflag & (BRKINT | PARMRK))
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port->read_status_mask |= UART01x_RSR_BE;
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uap->port.read_status_mask |= UART01x_RSR_BE;
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/*
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* Characters to ignore
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*/
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port->ignore_status_mask = 0;
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uap->port.ignore_status_mask = 0;
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
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uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
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if (termios->c_iflag & IGNBRK) {
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port->ignore_status_mask |= UART01x_RSR_BE;
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uap->port.ignore_status_mask |= UART01x_RSR_BE;
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/*
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* If we're ignoring parity and break indicators,
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* ignore overruns too (for real raw support).
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*/
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= UART01x_RSR_OE;
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uap->port.ignore_status_mask |= UART01x_RSR_OE;
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}
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/*
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* Ignore all characters if CREAD is not set.
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*/
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if ((termios->c_cflag & CREAD) == 0)
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port->ignore_status_mask |= UART_DUMMY_RSR_RX;
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uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
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/* first, disable everything */
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old_cr = readb(port->membase + UART010_CR) & ~UART010_CR_MSIE;
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old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
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if (UART_ENABLE_MS(port, termios->c_cflag))
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old_cr |= UART010_CR_MSIE;
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writel(0, port->membase + UART010_CR);
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writel(0, uap->port.membase + UART010_CR);
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/* Set baud rate */
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quot -= 1;
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writel((quot & 0xf00) >> 8, port->membase + UART010_LCRM);
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writel(quot & 0xff, port->membase + UART010_LCRL);
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writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
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writel(quot & 0xff, uap->port.membase + UART010_LCRL);
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/*
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* ----------v----------v----------v----------v-----
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* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
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* ----------^----------^----------^----------^-----
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*/
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writel(lcr_h, port->membase + UART010_LCRH);
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writel(old_cr, port->membase + UART010_CR);
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writel(lcr_h, uap->port.membase + UART010_LCRH);
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writel(old_cr, uap->port.membase + UART010_CR);
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spin_unlock_irqrestore(&port->lock, flags);
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spin_unlock_irqrestore(&uap->port.lock, flags);
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}
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static const char *pl010_type(struct uart_port *port)
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@ -514,47 +524,48 @@ static struct uart_amba_port *amba_ports[UART_NR];
|
||||
|
||||
static void pl010_console_putchar(struct uart_port *port, int ch)
|
||||
{
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int status;
|
||||
|
||||
do {
|
||||
status = readb(port->membase + UART01x_FR);
|
||||
status = readb(uap->port.membase + UART01x_FR);
|
||||
barrier();
|
||||
} while (!UART_TX_READY(status));
|
||||
writel(ch, port->membase + UART01x_DR);
|
||||
writel(ch, uap->port.membase + UART01x_DR);
|
||||
}
|
||||
|
||||
static void
|
||||
pl010_console_write(struct console *co, const char *s, unsigned int count)
|
||||
{
|
||||
struct uart_port *port = &amba_ports[co->index]->port;
|
||||
struct uart_amba_port *uap = amba_ports[co->index];
|
||||
unsigned int status, old_cr;
|
||||
|
||||
/*
|
||||
* First save the CR then disable the interrupts
|
||||
*/
|
||||
old_cr = readb(port->membase + UART010_CR);
|
||||
writel(UART01x_CR_UARTEN, port->membase + UART010_CR);
|
||||
old_cr = readb(uap->port.membase + UART010_CR);
|
||||
writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
|
||||
|
||||
uart_console_write(port, s, count, pl010_console_putchar);
|
||||
uart_console_write(&uap->port, s, count, pl010_console_putchar);
|
||||
|
||||
/*
|
||||
* Finally, wait for transmitter to become empty
|
||||
* and restore the TCR
|
||||
*/
|
||||
do {
|
||||
status = readb(port->membase + UART01x_FR);
|
||||
status = readb(uap->port.membase + UART01x_FR);
|
||||
barrier();
|
||||
} while (status & UART01x_FR_BUSY);
|
||||
writel(old_cr, port->membase + UART010_CR);
|
||||
writel(old_cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void __init
|
||||
pl010_console_get_options(struct uart_port *port, int *baud,
|
||||
pl010_console_get_options(struct uart_amba_port *uap, int *baud,
|
||||
int *parity, int *bits)
|
||||
{
|
||||
if (readb(port->membase + UART010_CR) & UART01x_CR_UARTEN) {
|
||||
if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
|
||||
unsigned int lcr_h, quot;
|
||||
lcr_h = readb(port->membase + UART010_LCRH);
|
||||
lcr_h = readb(uap->port.membase + UART010_LCRH);
|
||||
|
||||
*parity = 'n';
|
||||
if (lcr_h & UART01x_LCRH_PEN) {
|
||||
@ -569,14 +580,15 @@ pl010_console_get_options(struct uart_port *port, int *baud,
|
||||
else
|
||||
*bits = 8;
|
||||
|
||||
quot = readb(port->membase + UART010_LCRL) | readb(port->membase + UART010_LCRM) << 8;
|
||||
*baud = port->uartclk / (16 * (quot + 1));
|
||||
quot = readb(uap->port.membase + UART010_LCRL) |
|
||||
readb(uap->port.membase + UART010_LCRM) << 8;
|
||||
*baud = uap->port.uartclk / (16 * (quot + 1));
|
||||
}
|
||||
}
|
||||
|
||||
static int __init pl010_console_setup(struct console *co, char *options)
|
||||
{
|
||||
struct uart_port *port;
|
||||
struct uart_amba_port *uap;
|
||||
int baud = 38400;
|
||||
int bits = 8;
|
||||
int parity = 'n';
|
||||
@ -589,16 +601,16 @@ static int __init pl010_console_setup(struct console *co, char *options)
|
||||
*/
|
||||
if (co->index >= UART_NR)
|
||||
co->index = 0;
|
||||
if (!amba_ports[co->index])
|
||||
uap = amba_ports[co->index];
|
||||
if (!uap)
|
||||
return -ENODEV;
|
||||
port = &amba_ports[co->index]->port;
|
||||
|
||||
if (options)
|
||||
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
else
|
||||
pl010_console_get_options(port, &baud, &parity, &bits);
|
||||
pl010_console_get_options(uap, &baud, &parity, &bits);
|
||||
|
||||
return uart_set_options(port, co, baud, parity, bits, flow);
|
||||
return uart_set_options(&uap->port, co, baud, parity, bits, flow);
|
||||
}
|
||||
|
||||
static struct uart_driver amba_reg;
|
||||
@ -629,7 +641,7 @@ static struct uart_driver amba_reg = {
|
||||
|
||||
static int pl010_probe(struct amba_device *dev, void *id)
|
||||
{
|
||||
struct uart_amba_port *port;
|
||||
struct uart_amba_port *uap;
|
||||
void __iomem *base;
|
||||
int i, ret;
|
||||
|
||||
@ -642,8 +654,8 @@ static int pl010_probe(struct amba_device *dev, void *id)
|
||||
goto out;
|
||||
}
|
||||
|
||||
port = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
|
||||
if (!port) {
|
||||
uap = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
|
||||
if (!uap) {
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
@ -654,51 +666,49 @@ static int pl010_probe(struct amba_device *dev, void *id)
|
||||
goto free;
|
||||
}
|
||||
|
||||
port->port.dev = &dev->dev;
|
||||
port->port.mapbase = dev->res.start;
|
||||
port->port.membase = base;
|
||||
port->port.iotype = UPIO_MEM;
|
||||
port->port.irq = dev->irq[0];
|
||||
port->port.uartclk = 14745600;
|
||||
port->port.fifosize = 16;
|
||||
port->port.ops = &amba_pl010_pops;
|
||||
port->port.flags = UPF_BOOT_AUTOCONF;
|
||||
port->port.line = i;
|
||||
port->dev = dev;
|
||||
port->data = dev->dev.platform_data;
|
||||
uap->port.dev = &dev->dev;
|
||||
uap->port.mapbase = dev->res.start;
|
||||
uap->port.membase = base;
|
||||
uap->port.iotype = UPIO_MEM;
|
||||
uap->port.irq = dev->irq[0];
|
||||
uap->port.uartclk = 14745600;
|
||||
uap->port.fifosize = 16;
|
||||
uap->port.ops = &amba_pl010_pops;
|
||||
uap->port.flags = UPF_BOOT_AUTOCONF;
|
||||
uap->port.line = i;
|
||||
uap->dev = dev;
|
||||
uap->data = dev->dev.platform_data;
|
||||
|
||||
amba_ports[i] = port;
|
||||
amba_ports[i] = uap;
|
||||
|
||||
amba_set_drvdata(dev, port);
|
||||
ret = uart_add_one_port(&amba_reg, &port->port);
|
||||
amba_set_drvdata(dev, uap);
|
||||
ret = uart_add_one_port(&amba_reg, &uap->port);
|
||||
if (ret) {
|
||||
amba_set_drvdata(dev, NULL);
|
||||
amba_ports[i] = NULL;
|
||||
iounmap(base);
|
||||
free:
|
||||
kfree(port);
|
||||
kfree(uap);
|
||||
}
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int pl010_remove(struct amba_device *dev)
|
||||
{
|
||||
struct uart_amba_port *port = amba_get_drvdata(dev);
|
||||
struct uart_amba_port *uap = amba_get_drvdata(dev);
|
||||
int i;
|
||||
|
||||
amba_set_drvdata(dev, NULL);
|
||||
|
||||
uart_remove_one_port(&amba_reg, &port->port);
|
||||
uart_remove_one_port(&amba_reg, &uap->port);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
|
||||
if (amba_ports[i] == port)
|
||||
if (amba_ports[i] == uap)
|
||||
amba_ports[i] = NULL;
|
||||
|
||||
iounmap(port->port.membase);
|
||||
kfree(port);
|
||||
|
||||
iounmap(uap->port.membase);
|
||||
kfree(uap);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user