forked from luck/tmp_suning_uos_patched
[MIPS] RB532: Do not define registers that are already defined
Use the register definitions of the MPMC controller from mach-rc32434/rb.h instead of redefining them. Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -49,8 +49,6 @@
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#define GPIO_ALE (1 << 0x0a)
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#define GPIO_CLE (1 << 0x0b)
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extern char *board_type;
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static struct resource korina_dev0_res[] = {
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{
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.name = "korina_regs",
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@ -265,14 +263,6 @@ static void __init parse_mac_addr(char *macstr)
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}
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/* DEVICE CONTROLLER 1 */
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#define CFG_DC_DEV1 ((void *)0xb8010010)
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#define CFG_DC_DEV2 ((void *)0xb8010020)
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#define CFG_DC_DEVBASE 0x0
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#define CFG_DC_DEVMASK 0x4
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#define CFG_DC_DEVC 0x8
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#define CFG_DC_DEVTC 0xC
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/* NAND definitions */
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#define NAND_CHIP_DELAY 25
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@ -301,16 +291,16 @@ static void __init rb532_nand_setup(void)
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static int __init plat_setup_devices(void)
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{
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/* Look for the CF card reader */
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if (!readl(CFG_DC_DEV1 + CFG_DC_DEVMASK))
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if (!readl(IDT434_REG_BASE + DEV1MASK))
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rb532_devs[1] = NULL;
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else {
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cf_slot0_res[0].start =
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readl(CFG_DC_DEV1 + CFG_DC_DEVBASE);
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readl(IDT434_REG_BASE + DEV1BASE);
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cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
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}
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/* Read the NAND resources from the device controller */
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nand_slot0_res[0].start = readl(CFG_DC_DEV2 + CFG_DC_DEVBASE);
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nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
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nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
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/* Initialise the NAND device */
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