forked from luck/tmp_suning_uos_patched
ste_dma40: move mode_opt to separate config
Defaults are "basic mode" for physical channels, and "logical source logical destination" for logical channels. Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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20a5b6d043
@ -132,7 +132,6 @@ static struct resource dma40_resources[] = {
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/* Default configuration for physcial memcpy */
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struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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.channel_type = STEDMA40_PCHAN_BASIC_MODE,
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.mode = STEDMA40_MODE_PHYSICAL,
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.dir = STEDMA40_MEM_TO_MEM,
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@ -148,8 +147,7 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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};
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/* Default configuration for logical memcpy */
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struct stedma40_chan_cfg dma40_memcpy_conf_log = {
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.channel_type = (STEDMA40_LCHAN_SRC_LOG_DST_LOG |
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STEDMA40_NO_TIM_FOR_LINK),
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.channel_type = STEDMA40_NO_TIM_FOR_LINK,
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.dir = STEDMA40_MEM_TO_MEM,
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.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
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@ -29,14 +29,14 @@ enum stedma40_mode {
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STEDMA40_MODE_OPERATION,
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};
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/* Mode options */
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#define STEDMA40_INFO_CH_MODE_OPT_POS 8
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#define STEDMA40_PCHAN_BASIC_MODE (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_PCHAN_MODULO_MODE (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_PCHAN_DOUBLE_DST_MODE (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_LCHAN_SRC_PHY_DST_LOG (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_LCHAN_SRC_LOG_DST_PHS (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_LCHAN_SRC_LOG_DST_LOG (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS)
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enum stedma40_mode_opt {
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STEDMA40_PCHAN_BASIC_MODE = 0,
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STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0,
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STEDMA40_PCHAN_MODULO_MODE,
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STEDMA40_PCHAN_DOUBLE_DST_MODE,
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STEDMA40_LCHAN_SRC_PHY_DST_LOG,
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STEDMA40_LCHAN_SRC_LOG_DST_PHY,
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};
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/* Interrupt */
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#define STEDMA40_INFO_TIM_POS 10
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@ -116,6 +116,7 @@ struct stedma40_half_channel_info {
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* @channel_type: priority, mode, mode options and interrupt configuration.
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* @high_priority: true if high-priority
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* @mode: channel mode: physical, logical, or operation
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* @mode_opt: options for the chosen channel mode
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* @src_dev_type: Src device type
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* @dst_dev_type: Dst device type
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* @src_info: Parameters for dst half channel
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@ -131,6 +132,7 @@ struct stedma40_chan_cfg {
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unsigned int channel_type;
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bool high_priority;
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enum stedma40_mode mode;
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enum stedma40_mode_opt mode_opt;
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int src_dev_type;
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int dst_dev_type;
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struct stedma40_half_channel_info src_info;
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@ -693,6 +693,31 @@ static u32 d40_chan_has_events(struct d40_chan *d40c)
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return val;
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}
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static u32 d40_get_prmo(struct d40_chan *d40c)
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{
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static const unsigned int phy_map[] = {
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[STEDMA40_PCHAN_BASIC_MODE]
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= D40_DREG_PRMO_PCHAN_BASIC,
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[STEDMA40_PCHAN_MODULO_MODE]
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= D40_DREG_PRMO_PCHAN_MODULO,
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[STEDMA40_PCHAN_DOUBLE_DST_MODE]
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= D40_DREG_PRMO_PCHAN_DOUBLE_DST,
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};
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static const unsigned int log_map[] = {
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[STEDMA40_LCHAN_SRC_PHY_DST_LOG]
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= D40_DREG_PRMO_LCHAN_SRC_PHY_DST_LOG,
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[STEDMA40_LCHAN_SRC_LOG_DST_PHY]
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= D40_DREG_PRMO_LCHAN_SRC_LOG_DST_PHY,
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[STEDMA40_LCHAN_SRC_LOG_DST_LOG]
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= D40_DREG_PRMO_LCHAN_SRC_LOG_DST_LOG,
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};
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if (d40c->log_num == D40_PHY_CHAN)
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return phy_map[d40c->dma_cfg.mode_opt];
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else
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return log_map[d40c->dma_cfg.mode_opt];
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}
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static void d40_config_write(struct d40_chan *d40c)
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{
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u32 addr_base;
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@ -706,8 +731,7 @@ static void d40_config_write(struct d40_chan *d40c)
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writel(var, d40c->base->virtbase + D40_DREG_PRMSE + addr_base);
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/* Setup operational mode option register */
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var = ((d40c->dma_cfg.channel_type >> STEDMA40_INFO_CH_MODE_OPT_POS) &
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0x3) << D40_CHAN_POS(d40c->phy_chan->num);
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var = d40_get_prmo(d40c) << D40_CHAN_POS(d40c->phy_chan->num);
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writel(var, d40c->base->virtbase + D40_DREG_PRMOE + addr_base);
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@ -130,6 +130,13 @@
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#define D40_DREG_PRMSO 0x014
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#define D40_DREG_PRMOE 0x018
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#define D40_DREG_PRMOO 0x01C
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#define D40_DREG_PRMO_PCHAN_BASIC 0x1
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#define D40_DREG_PRMO_PCHAN_MODULO 0x2
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#define D40_DREG_PRMO_PCHAN_DOUBLE_DST 0x3
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#define D40_DREG_PRMO_LCHAN_SRC_PHY_DST_LOG 0x1
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#define D40_DREG_PRMO_LCHAN_SRC_LOG_DST_PHY 0x2
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#define D40_DREG_PRMO_LCHAN_SRC_LOG_DST_LOG 0x3
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#define D40_DREG_LCPA 0x020
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#define D40_DREG_LCLA 0x024
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#define D40_DREG_ACTIVE 0x050
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