forked from luck/tmp_suning_uos_patched
powerpc/perf_event: Fix for power_pmu_disable()
When power_pmu_disable() removes the given event from a particular index into cpuhw->event[], it shuffles down higher event[] entries. But, this array is paired with cpuhw->events[] and cpuhw->flags[] so should shuffle them similarly. If these arrays get out of sync, code such as power_check_constraints() will fail. This caused a bug where events were temporarily disabled and then failed to be re-enabled; subsequent code tried to write_pmc() with its (disabled) idx of 0, causing a message "oops trying to write PMC0". This triggers this bug on POWER7, running a miss-heavy test: perf record -e L1-dcache-load-misses -e L1-dcache-store-misses ./misstest Signed-off-by: Matt Evans <matt@ozlabs.org> Acked-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -791,8 +791,11 @@ static void power_pmu_disable(struct perf_event *event)
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cpuhw = &__get_cpu_var(cpu_hw_events);
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cpuhw = &__get_cpu_var(cpu_hw_events);
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for (i = 0; i < cpuhw->n_events; ++i) {
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for (i = 0; i < cpuhw->n_events; ++i) {
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if (event == cpuhw->event[i]) {
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if (event == cpuhw->event[i]) {
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while (++i < cpuhw->n_events)
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while (++i < cpuhw->n_events) {
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cpuhw->event[i-1] = cpuhw->event[i];
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cpuhw->event[i-1] = cpuhw->event[i];
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cpuhw->events[i-1] = cpuhw->events[i];
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cpuhw->flags[i-1] = cpuhw->flags[i];
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}
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--cpuhw->n_events;
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--cpuhw->n_events;
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ppmu->disable_pmc(event->hw.idx - 1, cpuhw->mmcr);
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ppmu->disable_pmc(event->hw.idx - 1, cpuhw->mmcr);
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if (event->hw.idx) {
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if (event->hw.idx) {
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