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uio: Convert uio_generic_pci to new intx masking API

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The new PCI API provides both generic probing for 2.3 masking support
and check&mask in the interrupt handler.

Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Jan Kiszka 2011-11-04 09:46:01 +01:00 committed by Jesse Barnes
parent a2e27787f8
commit 2502dbdfc8
1 changed files with 6 additions and 71 deletions
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77
drivers/uio/uio_pci_generic.c
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@ -45,78 +45,12 @@ to_uio_pci_generic_dev(struct uio_info *info)
static irqreturn_t irqhandler(int irq, struct uio_info *info) static irqreturn_t irqhandler(int irq, struct uio_info *info)
{ {
struct uio_pci_generic_dev *gdev = to_uio_pci_generic_dev(info); struct uio_pci_generic_dev *gdev = to_uio_pci_generic_dev(info);
struct pci_dev *pdev = gdev->pdev;
irqreturn_t ret = IRQ_NONE;
u32 cmd_status_dword;
u16 origcmd, newcmd, status;
/* We do a single dword read to retrieve both command and status. if (!pci_check_and_mask_intx(gdev->pdev))
* Document assumptions that make this possible. */ return IRQ_NONE;
BUILD_BUG_ON(PCI_COMMAND % 4);
BUILD_BUG_ON(PCI_COMMAND + 2 != PCI_STATUS);
if (!pci_cfg_access_trylock(pdev))
goto error;
/* Read both command and status registers in a single 32-bit operation.
* Note: we could cache the value for command and move the status read
* out of the lock if there was a way to get notified of user changes
* to command register through sysfs. Should be good for shared irqs. */
pci_read_config_dword(pdev, PCI_COMMAND, &cmd_status_dword);
origcmd = cmd_status_dword;
status = cmd_status_dword >> 16;
/* Check interrupt status register to see whether our device
* triggered the interrupt. */
if (!(status & PCI_STATUS_INTERRUPT))
goto done;
/* We triggered the interrupt, disable it. */
newcmd = origcmd | PCI_COMMAND_INTX_DISABLE;
if (newcmd != origcmd)
pci_write_config_word(pdev, PCI_COMMAND, newcmd);
/* UIO core will signal the user process. */ /* UIO core will signal the user process. */
ret = IRQ_HANDLED; return IRQ_HANDLED;
done:
pci_cfg_access_lock(pdev);
return ret;
}
/* Verify that the device supports Interrupt Disable bit in command register,
* per PCI 2.3, by flipping this bit and reading it back: this bit was readonly
* in PCI 2.2. */
static int __devinit verify_pci_2_3(struct pci_dev *pdev)
{
u16 orig, new;
int err = 0;
pci_cfg_access_lock(pdev);
pci_read_config_word(pdev, PCI_COMMAND, &orig);
pci_write_config_word(pdev, PCI_COMMAND,
orig ^ PCI_COMMAND_INTX_DISABLE);
pci_read_config_word(pdev, PCI_COMMAND, &new);
/* There's no way to protect against
* hardware bugs or detect them reliably, but as long as we know
* what the value should be, let's go ahead and check it. */
if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) {
err = -EBUSY;
dev_err(&pdev->dev, "Command changed from 0x%x to 0x%x: "
"driver or HW bug?\n", orig, new);
goto err;
}
if (!((new ^ orig) & PCI_COMMAND_INTX_DISABLE)) {
dev_warn(&pdev->dev, "Device does not support "
"disabling interrupts: unable to bind.\n");
err = -ENODEV;
goto err;
}
/* Now restore the original value. */
pci_write_config_word(pdev, PCI_COMMAND, orig);
err:
pci_cfg_access_unlock(pdev);
return err;
} }
static int __devinit probe(struct pci_dev *pdev, static int __devinit probe(struct pci_dev *pdev,
@ -139,9 +73,10 @@ static int __devinit probe(struct pci_dev *pdev,
return -ENODEV; return -ENODEV;
} }
err = verify_pci_2_3(pdev); if (!pci_intx_mask_supported(pdev)) {
if (err) err = -ENODEV;
goto err_verify; goto err_verify;
}
gdev = kzalloc(sizeof(struct uio_pci_generic_dev), GFP_KERNEL); gdev = kzalloc(sizeof(struct uio_pci_generic_dev), GFP_KERNEL);
if (!gdev) { if (!gdev) {