forked from luck/tmp_suning_uos_patched
fsl_ifc: Fix csor_ext position in fsl_ifc_regs
According to Freescale manuals, the IFC_CSORn_EXT register is located immediately _after_ the bank's IFC_CSORn register. This patch adjusts the csor_ext member of and reserved register arrays immediately surrounding the csor_cs structure to provide proper access to this register. Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Acked-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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@ -781,13 +781,13 @@ struct fsl_ifc_regs {
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__be32 amask;
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u32 res4[0x2];
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} amask_cs[FSL_IFC_BANK_COUNT];
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u32 res5[0x17];
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u32 res5[0x18];
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struct {
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__be32 csor_ext;
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__be32 csor;
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__be32 csor_ext;
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u32 res6;
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} csor_cs[FSL_IFC_BANK_COUNT];
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u32 res7[0x19];
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u32 res7[0x18];
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struct {
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__be32 ftim[4];
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u32 res8[0x8];
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