forked from luck/tmp_suning_uos_patched
MIPS: traps: Dump the PageGrain and Wired registers on MC
They can be useful to determine how the MMU is configured on a MC exception. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8401/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -1432,6 +1432,8 @@ asmlinkage void do_mcheck(struct pt_regs *regs)
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pr_err("EntryHi : %0*lx\n", field, read_c0_entryhi());
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pr_err("EntryLo0: %0*lx\n", field, read_c0_entrylo0());
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pr_err("EntryLo1: %0*lx\n", field, read_c0_entrylo1());
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pr_err("Wired : %0x\n", read_c0_wired());
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pr_err("Pagegrain: %0x\n", read_c0_pagegrain());
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if (cpu_has_htw) {
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pr_err("PWField : %0*lx\n", field, read_c0_pwfield());
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pr_err("PWSize : %0*lx\n", field, read_c0_pwsize());
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