drm/radeon: add get_temperature() callbacks for CIK (v2)

This added support for the on-chip thermal sensors on
CIK asics.

v2: fix register offset.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-06-21 15:50:47 -04:00
parent 12262906b1
commit 286d9cc67a
5 changed files with 51 additions and 0 deletions

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@ -69,6 +69,43 @@ static void cik_program_aspm(struct radeon_device *rdev);
static void cik_init_pg(struct radeon_device *rdev);
static void cik_init_cg(struct radeon_device *rdev);
/* get temperature in millidegrees */
int ci_get_temp(struct radeon_device *rdev)
{
u32 temp;
int actual_temp = 0;
temp = (RREG32_SMC(CG_MULT_THERMAL_STATUS) & CTF_TEMP_MASK) >>
CTF_TEMP_SHIFT;
if (temp & 0x200)
actual_temp = 255;
else
actual_temp = temp & 0x1ff;
actual_temp = actual_temp * 1000;
return actual_temp;
}
/* get temperature in millidegrees */
int kv_get_temp(struct radeon_device *rdev)
{
u32 temp;
int actual_temp = 0;
temp = RREG32_SMC(0xC0300E0C);
if (temp)
actual_temp = (temp / 8) - 49;
else
actual_temp = 0;
actual_temp = actual_temp * 1000;
return actual_temp;
}
/*
* Indirect registers accessor
*/

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@ -32,6 +32,14 @@
#define GENERAL_PWRMGT 0xC0200000
# define GPU_COUNTER_CLK (1 << 15)
#define CG_MULT_THERMAL_STATUS 0xC0300014
#define ASIC_MAX_TEMP(x) ((x) << 0)
#define ASIC_MAX_TEMP_MASK 0x000001ff
#define ASIC_MAX_TEMP_SHIFT 0
#define CTF_TEMP(x) ((x) << 9)
#define CTF_TEMP_MASK 0x0003fe00
#define CTF_TEMP_SHIFT 9
#define MPLL_BYPASSCLK_SEL 0xC050019C
# define MPLL_CLKOUT_SEL(x) ((x) << 8)
# define MPLL_CLKOUT_SEL_MASK 0xFF00

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@ -2452,6 +2452,7 @@ static struct radeon_asic ci_asic = {
.set_pcie_lanes = NULL,
.set_clock_gating = NULL,
.set_uvd_clocks = &cik_set_uvd_clocks,
.get_temperature = &ci_get_temp,
},
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,
@ -2607,6 +2608,7 @@ static struct radeon_asic kv_asic = {
.set_pcie_lanes = NULL,
.set_clock_gating = NULL,
.set_uvd_clocks = &cik_set_uvd_clocks,
.get_temperature = &kv_get_temp,
},
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,

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@ -747,5 +747,7 @@ u32 cik_compute_ring_get_wptr(struct radeon_device *rdev,
struct radeon_ring *ring);
void cik_compute_ring_set_wptr(struct radeon_device *rdev,
struct radeon_ring *ring);
int ci_get_temp(struct radeon_device *rdev);
int kv_get_temp(struct radeon_device *rdev);
#endif

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@ -569,6 +569,8 @@ static int radeon_hwmon_init(struct radeon_device *rdev)
case THERMAL_TYPE_NI:
case THERMAL_TYPE_SUMO:
case THERMAL_TYPE_SI:
case THERMAL_TYPE_CI:
case THERMAL_TYPE_KV:
if (rdev->asic->pm.get_temperature == NULL)
return err;
rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev);