forked from luck/tmp_suning_uos_patched
blackfin: bf60x: enable gptimer clock source
Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
This commit is contained in:
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e578bbdeb8
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2879bb30d7
@ -43,6 +43,13 @@
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# define TIMER8_GROUP_REG TMRS4_ENABLE
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# define TIMER_GROUP2 1
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#endif
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/*
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* BF609: 8 timers:
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*/
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#if defined(CONFIG_BF60x)
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# define MAX_BLACKFIN_GPTIMERS 8
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# define TIMER0_GROUP_REG TIMER_RUN
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#endif
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/*
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* All others: 3 timers:
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*/
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@ -104,6 +111,72 @@
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# define FS2_TIMER_BIT TIMER1bit
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#endif
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#ifdef CONFIG_BF60x
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/*
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* Timer Configuration Register Bits
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*/
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#define TIMER_EMU_RUN 0x8000
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#define TIMER_BPER_EN 0x4000
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#define TIMER_BWID_EN 0x2000
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#define TIMER_BDLY_EN 0x1000
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#define TIMER_OUT_DIS 0x0800
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#define TIMER_TIN_SEL 0x0400
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#define TIMER_CLK_SEL 0x0300
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#define TIMER_CLK_SCLK 0x0000
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#define TIMER_CLK_ALT_CLK0 0x0100
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#define TIMER_CLK_ALT_CLK1 0x0300
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#define TIMER_PULSE_HI 0x0080
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#define TIMER_SLAVE_TRIG 0x0040
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#define TIMER_IRQ_MODE 0x0030
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#define TIMER_IRQ_ACT_EDGE 0x0000
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#define TIMER_IRQ_DLY 0x0010
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#define TIMER_IRQ_WID_DLY 0x0020
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#define TIMER_IRQ_PER 0x0030
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#define TIMER_MODE 0x000f
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#define TIMER_MODE_WDOG_P 0x0008
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#define TIMER_MODE_WDOG_W 0x0009
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#define TIMER_MODE_PWM_CONT 0x000c
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#define TIMER_MODE_PWM 0x000d
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#define TIMER_MODE_WDTH 0x000a
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#define TIMER_MODE_WDTH_D 0x000b
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#define TIMER_MODE_EXT_CLK 0x000e
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#define TIMER_MODE_PININT 0x000f
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/*
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* Timer Status Register Bits
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*/
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#define TIMER_STATUS_TIMIL0 0x0001
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#define TIMER_STATUS_TIMIL1 0x0002
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#define TIMER_STATUS_TIMIL2 0x0004
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#define TIMER_STATUS_TIMIL3 0x0008
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#define TIMER_STATUS_TIMIL4 0x0010
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#define TIMER_STATUS_TIMIL5 0x0020
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#define TIMER_STATUS_TIMIL6 0x0040
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#define TIMER_STATUS_TIMIL7 0x0080
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#define TIMER_STATUS_TOVF0 0x0001 /* timer 0 overflow error */
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#define TIMER_STATUS_TOVF1 0x0002
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#define TIMER_STATUS_TOVF2 0x0004
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#define TIMER_STATUS_TOVF3 0x0008
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#define TIMER_STATUS_TOVF4 0x0010
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#define TIMER_STATUS_TOVF5 0x0020
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#define TIMER_STATUS_TOVF6 0x0040
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#define TIMER_STATUS_TOVF7 0x0080
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/*
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* Timer Slave Enable Status : write 1 to clear
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*/
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#define TIMER_STATUS_TRUN0 0x0001
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#define TIMER_STATUS_TRUN1 0x0002
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#define TIMER_STATUS_TRUN2 0x0004
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#define TIMER_STATUS_TRUN3 0x0008
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#define TIMER_STATUS_TRUN4 0x0010
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#define TIMER_STATUS_TRUN5 0x0020
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#define TIMER_STATUS_TRUN6 0x0040
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#define TIMER_STATUS_TRUN7 0x0080
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#else
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/*
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* Timer Configuration Register Bits
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*/
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@ -170,12 +243,18 @@
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#define TIMER_STATUS_TRUN10 0x4000
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#define TIMER_STATUS_TRUN11 0x8000
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#endif
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/* The actual gptimer API */
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void set_gptimer_pwidth(unsigned int timer_id, uint32_t width);
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uint32_t get_gptimer_pwidth(unsigned int timer_id);
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void set_gptimer_period(unsigned int timer_id, uint32_t period);
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uint32_t get_gptimer_period(unsigned int timer_id);
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#ifdef CONFIG_BF60x
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void set_gptimer_delay(unsigned int timer_id, uint32_t delay);
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uint32_t get_gptimer_delay(unsigned int timer_id);
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#endif
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uint32_t get_gptimer_count(unsigned int timer_id);
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int get_gptimer_intr(unsigned int timer_id);
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void clear_gptimer_intr(unsigned int timer_id);
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@ -217,16 +296,41 @@ struct bfin_gptimer_regs {
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u32 counter;
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u32 period;
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u32 width;
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#ifdef CONFIG_BF60x
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u32 delay;
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#endif
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};
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/*
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* bfin group timer registers layout
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*/
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#ifndef CONFIG_BF60x
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struct bfin_gptimer_group_regs {
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__BFP(enable);
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__BFP(disable);
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u32 status;
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};
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#else
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struct bfin_gptimer_group_regs {
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__BFP(run);
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__BFP(enable);
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__BFP(disable);
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__BFP(stop_cfg);
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__BFP(stop_cfg_set);
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__BFP(stop_cfg_clr);
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__BFP(data_imsk);
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__BFP(stat_imsk);
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__BFP(tr_msk);
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__BFP(tr_ie);
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__BFP(data_ilat);
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__BFP(stat_ilat);
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__BFP(err_status);
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__BFP(bcast_per);
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__BFP(bcast_wid);
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__BFP(bcast_dly);
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};
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#endif
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#undef __BFP
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@ -23,7 +23,11 @@
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printk(KERN_DEBUG "%s:%s:%i: Assertion failed: " #expr "\n", __FILE__, __func__, __LINE__);
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#endif
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#define BFIN_TIMER_NUM_GROUP (BFIN_TIMER_OCTET(MAX_BLACKFIN_GPTIMERS - 1) + 1)
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#ifndef CONFIG_BF60x
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# define BFIN_TIMER_NUM_GROUP (BFIN_TIMER_OCTET(MAX_BLACKFIN_GPTIMERS - 1) + 1)
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#else
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# define BFIN_TIMER_NUM_GROUP 1
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#endif
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static struct bfin_gptimer_regs * const timer_regs[MAX_BLACKFIN_GPTIMERS] =
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{
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@ -158,6 +162,74 @@ uint32_t get_gptimer_count(unsigned int timer_id)
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}
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EXPORT_SYMBOL(get_gptimer_count);
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#ifdef CONFIG_BF60x
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void set_gptimer_delay(unsigned int timer_id, uint32_t delay)
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{
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tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
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bfin_write(&timer_regs[timer_id]->delay, delay);
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SSYNC();
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}
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EXPORT_SYMBOL(set_gptimer_delay);
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uint32_t get_gptimer_delay(unsigned int timer_id)
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{
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tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
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return bfin_read(&timer_regs[timer_id]->delay);
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}
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EXPORT_SYMBOL(get_gptimer_delay);
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#endif
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#ifdef CONFIG_BF60x
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int get_gptimer_intr(unsigned int timer_id)
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{
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tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
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return !!(bfin_read(&group_regs[BFIN_TIMER_OCTET(timer_id)]->data_ilat) & timil_mask[timer_id]);
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}
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EXPORT_SYMBOL(get_gptimer_intr);
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void clear_gptimer_intr(unsigned int timer_id)
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{
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tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
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bfin_write(&group_regs[BFIN_TIMER_OCTET(timer_id)]->data_ilat, timil_mask[timer_id]);
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}
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EXPORT_SYMBOL(clear_gptimer_intr);
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int get_gptimer_over(unsigned int timer_id)
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{
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tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
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return !!(bfin_read(&group_regs[BFIN_TIMER_OCTET(timer_id)]->stat_ilat) & tovf_mask[timer_id]);
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}
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EXPORT_SYMBOL(get_gptimer_over);
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void clear_gptimer_over(unsigned int timer_id)
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{
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tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
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bfin_write(&group_regs[BFIN_TIMER_OCTET(timer_id)]->stat_ilat, tovf_mask[timer_id]);
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}
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EXPORT_SYMBOL(clear_gptimer_over);
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int get_gptimer_run(unsigned int timer_id)
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{
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tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
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return !!(bfin_read(&group_regs[BFIN_TIMER_OCTET(timer_id)]->run) & trun_mask[timer_id]);
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}
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EXPORT_SYMBOL(get_gptimer_run);
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uint32_t get_gptimer_status(unsigned int group)
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{
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tassert(group < BFIN_TIMER_NUM_GROUP);
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return bfin_read(&group_regs[group]->data_ilat);
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}
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EXPORT_SYMBOL(get_gptimer_status);
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void set_gptimer_status(unsigned int group, uint32_t value)
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{
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tassert(group < BFIN_TIMER_NUM_GROUP);
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bfin_write(&group_regs[group]->data_ilat, value);
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SSYNC();
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}
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EXPORT_SYMBOL(set_gptimer_status);
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#else
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uint32_t get_gptimer_status(unsigned int group)
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{
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tassert(group < BFIN_TIMER_NUM_GROUP);
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@ -212,6 +284,7 @@ int get_gptimer_run(unsigned int timer_id)
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return !!(read_gptimer_status(timer_id) & trun_mask[timer_id]);
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}
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EXPORT_SYMBOL(get_gptimer_run);
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#endif
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void set_gptimer_config(unsigned int timer_id, uint16_t config)
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{
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@ -231,6 +304,12 @@ EXPORT_SYMBOL(get_gptimer_config);
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void enable_gptimers(uint16_t mask)
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{
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int i;
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#ifdef CONFIG_BF60x
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uint16_t imask;
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imask = bfin_read16(TIMER_DATA_IMSK);
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imask &= ~mask;
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bfin_write16(TIMER_DATA_IMSK, imask);
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#endif
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tassert((mask & ~BLACKFIN_GPTIMER_IDMASK) == 0);
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for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) {
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bfin_write(&group_regs[i]->enable, mask & 0xFF);
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@ -255,10 +334,12 @@ void disable_gptimers(uint16_t mask)
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{
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int i;
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_disable_gptimers(mask);
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#ifndef CONFIG_BF60x
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for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i)
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if (mask & (1 << i))
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bfin_write(&group_regs[BFIN_TIMER_OCTET(i)]->status, trun_mask[i]);
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SSYNC();
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#endif
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}
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EXPORT_SYMBOL(disable_gptimers);
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@ -66,8 +66,14 @@ void __init setup_gptimer0(void)
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{
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disable_gptimers(TIMER0bit);
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#ifdef CONFIG_BF60x
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bfin_write16(TIMER_DATA_IMSK, 0);
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set_gptimer_config(TIMER0_id, TIMER_OUT_DIS
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| TIMER_MODE_PWM_CONT | TIMER_PULSE_HI | TIMER_IRQ_PER);
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#else
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set_gptimer_config(TIMER0_id, \
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TIMER_OUT_DIS | TIMER_PERIOD_CNT | TIMER_MODE_PWM);
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#endif
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set_gptimer_period(TIMER0_id, -1);
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set_gptimer_pwidth(TIMER0_id, -2);
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SSYNC();
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@ -135,9 +141,15 @@ static void bfin_gptmr0_set_mode(enum clock_event_mode mode,
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{
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC: {
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#ifndef CONFIG_BF60x
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set_gptimer_config(TIMER0_id, \
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TIMER_OUT_DIS | TIMER_IRQ_ENA | \
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TIMER_PERIOD_CNT | TIMER_MODE_PWM);
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#else
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set_gptimer_config(TIMER0_id, TIMER_OUT_DIS
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| TIMER_MODE_PWM_CONT | TIMER_PULSE_HI | TIMER_IRQ_PER);
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#endif
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set_gptimer_period(TIMER0_id, get_sclk() / HZ);
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set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1);
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enable_gptimers(TIMER0bit);
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@ -145,8 +157,14 @@ static void bfin_gptmr0_set_mode(enum clock_event_mode mode,
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}
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case CLOCK_EVT_MODE_ONESHOT:
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disable_gptimers(TIMER0bit);
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#ifndef CONFIG_BF60x
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set_gptimer_config(TIMER0_id, \
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TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM);
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#else
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set_gptimer_config(TIMER0_id, TIMER_OUT_DIS | TIMER_MODE_PWM
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| TIMER_PULSE_HI | TIMER_IRQ_WID_DLY);
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#endif
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set_gptimer_period(TIMER0_id, 0);
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break;
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case CLOCK_EVT_MODE_UNUSED:
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@ -160,7 +178,7 @@ static void bfin_gptmr0_set_mode(enum clock_event_mode mode,
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static void bfin_gptmr0_ack(void)
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{
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set_gptimer_status(TIMER_GROUP1, TIMER_STATUS_TIMIL0);
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clear_gptimer_intr(TIMER0_id);
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}
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static void __init bfin_gptmr0_init(void)
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@ -197,7 +215,7 @@ static struct clock_event_device clockevent_gptmr0 = {
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.rating = 300,
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.irq = IRQ_TIMER0,
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.shift = 32,
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_next_event = bfin_gptmr0_set_next_event,
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.set_mode = bfin_gptmr0_set_mode,
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};
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@ -307,6 +325,11 @@ void bfin_coretmr_clockevent_init(void)
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unsigned int cpu = smp_processor_id();
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struct clock_event_device *evt = &per_cpu(coretmr_events, cpu);
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#ifdef CONFIG_SMP
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evt->broadcast = smp_timer_broadcast;
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#endif
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#ifdef CONFIG_SMP
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evt->broadcast = smp_timer_broadcast;
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#endif
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