forked from luck/tmp_suning_uos_patched
plat-mxc/ehci.c: fix compile breakage
commits2eb42d5c28
and9e1dde3387
renamed some defines but didn't fix all the places where these defines are used leading to a compile failure for USB on i.MX31, 35 and 27. Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -115,7 +115,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
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#endif /* if defined(CONFIG_SOC_IMX25) */
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#if defined(CONFIG_ARCH_MX3)
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if (cpu_is_mx31()) {
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v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
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v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR +
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USBCTRL_OTGBASE_OFFSET));
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switch (port) {
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@ -153,13 +153,13 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
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return -EINVAL;
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}
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writel(v, MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
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writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR +
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USBCTRL_OTGBASE_OFFSET));
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return 0;
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}
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if (cpu_is_mx35()) {
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v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
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v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
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USBCTRL_OTGBASE_OFFSET));
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switch (port) {
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@ -196,7 +196,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
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return -EINVAL;
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}
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writel(v, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
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writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
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USBCTRL_OTGBASE_OFFSET));
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return 0;
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}
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@ -206,7 +206,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
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/* On i.MX27 we can use the i.MX31 USBCTRL bits, they
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* are identical
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*/
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v = readl(MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
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v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR +
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USBCTRL_OTGBASE_OFFSET));
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switch (port) {
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case 0: /* OTG port */
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@ -241,7 +241,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
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default:
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return -EINVAL;
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}
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writel(v, MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
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writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR +
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USBCTRL_OTGBASE_OFFSET));
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return 0;
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}
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@ -93,9 +93,9 @@ void fsl_udc_clk_finalize(struct platform_device *pdev)
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/* workaround ENGcm09152 for i.MX35 */
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if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) {
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v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
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v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
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USBPHYCTRL_OTGBASE_OFFSET));
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writel(v | USBPHYCTRL_EVDO, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
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writel(v | USBPHYCTRL_EVDO, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
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USBPHYCTRL_OTGBASE_OFFSET));
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}
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#endif
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