forked from luck/tmp_suning_uos_patched
mach-ux500: set proper I2C platform data from MOP500s
This specifies the new per-platform timeout per I2C bus and switches the I2C buses to fast mode, and increase the FIFO depth to 8 for reads and writes. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -204,7 +204,7 @@ static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
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},
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};
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#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \
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#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, t_out, _sm) \
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static struct nmk_i2c_controller u8500_i2c##id##_data = { \
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/* \
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* slave data setup time, which is \
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@ -219,19 +219,21 @@ static struct nmk_i2c_controller u8500_i2c##id##_data = { \
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.rft = _rft, \
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/* std. mode operation */ \
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.clk_freq = clk, \
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/* Slave response timeout(ms) */\
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.timeout = t_out, \
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.sm = _sm, \
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}
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/*
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* The board uses 4 i2c controllers, initialize all of
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* them with slave data setup time of 250 ns,
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* Tx & Rx FIFO threshold values as 1 and standard
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* Tx & Rx FIFO threshold values as 8 and standard
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* mode of operation
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*/
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U8500_I2C_CONTROLLER(0, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
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U8500_I2C_CONTROLLER(1, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
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U8500_I2C_CONTROLLER(2, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
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U8500_I2C_CONTROLLER(3, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
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U8500_I2C_CONTROLLER(0, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
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U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
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U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
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U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
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static void __init mop500_i2c_init(void)
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{
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