forked from luck/tmp_suning_uos_patched
x86: Cleanup the genirq name space
genirq is switching to a consistent name space for the irq related functions. Convert x86. Conversion was done with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
parent
c1c5e4d463
commit
2c778651f7
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@ -187,7 +187,7 @@ int __init arch_early_irq_init(void)
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irq_reserve_irqs(0, legacy_pic->nr_legacy_irqs);
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for (i = 0; i < count; i++) {
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set_irq_chip_data(i, &cfg[i]);
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irq_set_chip_data(i, &cfg[i]);
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zalloc_cpumask_var_node(&cfg[i].domain, GFP_KERNEL, node);
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zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_KERNEL, node);
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/*
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@ -206,7 +206,7 @@ int __init arch_early_irq_init(void)
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#ifdef CONFIG_SPARSE_IRQ
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static struct irq_cfg *irq_cfg(unsigned int irq)
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{
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return get_irq_chip_data(irq);
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return irq_get_chip_data(irq);
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}
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static struct irq_cfg *alloc_irq_cfg(unsigned int irq, int node)
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@ -232,7 +232,7 @@ static void free_irq_cfg(unsigned int at, struct irq_cfg *cfg)
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{
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if (!cfg)
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return;
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set_irq_chip_data(at, NULL);
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irq_set_chip_data(at, NULL);
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free_cpumask_var(cfg->domain);
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free_cpumask_var(cfg->old_domain);
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kfree(cfg);
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@ -262,14 +262,14 @@ static struct irq_cfg *alloc_irq_and_cfg_at(unsigned int at, int node)
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if (res < 0) {
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if (res != -EEXIST)
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return NULL;
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cfg = get_irq_chip_data(at);
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cfg = irq_get_chip_data(at);
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if (cfg)
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return cfg;
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}
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cfg = alloc_irq_cfg(at, node);
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if (cfg)
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set_irq_chip_data(at, cfg);
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irq_set_chip_data(at, cfg);
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else
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irq_free_desc(at);
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return cfg;
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@ -1185,7 +1185,7 @@ void __setup_vector_irq(int cpu)
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raw_spin_lock(&vector_lock);
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/* Mark the inuse vectors */
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for_each_active_irq(irq) {
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cfg = get_irq_chip_data(irq);
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cfg = irq_get_chip_data(irq);
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if (!cfg)
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continue;
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/*
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@ -1249,25 +1249,24 @@ static void ioapic_register_intr(unsigned int irq, unsigned long trigger)
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else
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irq_clear_status_flags(irq, IRQ_LEVEL);
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if (irq_remapped(get_irq_chip_data(irq))) {
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if (irq_remapped(irq_get_chip_data(irq))) {
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irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
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if (trigger)
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set_irq_chip_and_handler_name(irq, &ir_ioapic_chip,
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irq_set_chip_and_handler_name(irq, &ir_ioapic_chip,
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handle_fasteoi_irq,
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"fasteoi");
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"fasteoi");
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else
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set_irq_chip_and_handler_name(irq, &ir_ioapic_chip,
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irq_set_chip_and_handler_name(irq, &ir_ioapic_chip,
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handle_edge_irq, "edge");
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return;
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}
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if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
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trigger == IOAPIC_LEVEL)
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set_irq_chip_and_handler_name(irq, &ioapic_chip,
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handle_fasteoi_irq,
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"fasteoi");
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irq_set_chip_and_handler_name(irq, &ioapic_chip,
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handle_fasteoi_irq, "fasteoi");
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else
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set_irq_chip_and_handler_name(irq, &ioapic_chip,
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irq_set_chip_and_handler_name(irq, &ioapic_chip,
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handle_edge_irq, "edge");
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}
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@ -1491,7 +1490,8 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
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* The timer IRQ doesn't have to know that behind the
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* scene we may have a 8259A-master in AEOI mode ...
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*/
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set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge");
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irq_set_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq,
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"edge");
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/*
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* Add it to the IO-APIC irq-routing table:
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@ -1598,7 +1598,7 @@ __apicdebuginit(void) print_IO_APIC(void)
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for_each_active_irq(irq) {
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struct irq_pin_list *entry;
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cfg = get_irq_chip_data(irq);
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cfg = irq_get_chip_data(irq);
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if (!cfg)
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continue;
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entry = cfg->irq_2_pin;
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@ -2364,7 +2364,7 @@ static void irq_complete_move(struct irq_cfg *cfg)
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void irq_force_complete_move(int irq)
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{
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struct irq_cfg *cfg = get_irq_chip_data(irq);
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struct irq_cfg *cfg = irq_get_chip_data(irq);
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if (!cfg)
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return;
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@ -2587,7 +2587,7 @@ static inline void init_IO_APIC_traps(void)
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* 0x80, because int 0x80 is hm, kind of importantish. ;)
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*/
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for_each_active_irq(irq) {
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cfg = get_irq_chip_data(irq);
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cfg = irq_get_chip_data(irq);
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if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) {
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/*
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* Hmm.. We don't have an entry for this,
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@ -2598,7 +2598,7 @@ static inline void init_IO_APIC_traps(void)
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legacy_pic->make_irq(irq);
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else
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/* Strange. Oh, well.. */
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set_irq_chip(irq, &no_irq_chip);
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irq_set_chip(irq, &no_irq_chip);
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}
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}
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}
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@ -2638,7 +2638,7 @@ static struct irq_chip lapic_chip __read_mostly = {
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static void lapic_register_intr(int irq)
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{
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irq_clear_status_flags(irq, IRQ_LEVEL);
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set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq,
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irq_set_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq,
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"edge");
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}
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@ -2722,7 +2722,7 @@ int timer_through_8259 __initdata;
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*/
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static inline void __init check_timer(void)
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{
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struct irq_cfg *cfg = get_irq_chip_data(0);
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struct irq_cfg *cfg = irq_get_chip_data(0);
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int node = cpu_to_node(0);
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int apic1, pin1, apic2, pin2;
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unsigned long flags;
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@ -3033,7 +3033,7 @@ unsigned int create_irq_nr(unsigned int from, int node)
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raw_spin_unlock_irqrestore(&vector_lock, flags);
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if (ret) {
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set_irq_chip_data(irq, cfg);
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irq_set_chip_data(irq, cfg);
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irq_clear_status_flags(irq, IRQ_NOREQUEST);
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} else {
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free_irq_at(irq, cfg);
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@ -3058,7 +3058,7 @@ int create_irq(void)
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void destroy_irq(unsigned int irq)
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{
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struct irq_cfg *cfg = get_irq_chip_data(irq);
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struct irq_cfg *cfg = irq_get_chip_data(irq);
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unsigned long flags;
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irq_set_status_flags(irq, IRQ_NOREQUEST|IRQ_NOPROBE);
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@ -3092,7 +3092,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
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dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
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if (irq_remapped(get_irq_chip_data(irq))) {
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if (irq_remapped(irq_get_chip_data(irq))) {
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struct irte irte;
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int ir_index;
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u16 sub_handle;
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@ -3271,14 +3271,16 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
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if (ret < 0)
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return ret;
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set_irq_msi(irq, msidesc);
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irq_set_msi_desc(irq, msidesc);
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write_msi_msg(irq, &msg);
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if (irq_remapped(get_irq_chip_data(irq))) {
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if (irq_remapped(irq_get_chip_data(irq))) {
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irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
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set_irq_chip_and_handler_name(irq, &msi_ir_chip, handle_edge_irq, "edge");
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irq_set_chip_and_handler_name(irq, &msi_ir_chip,
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handle_edge_irq, "edge");
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} else
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set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge");
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irq_set_chip_and_handler_name(irq, &msi_chip,
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handle_edge_irq, "edge");
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dev_printk(KERN_DEBUG, &dev->dev, "irq %d for MSI/MSI-X\n", irq);
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@ -3396,8 +3398,8 @@ int arch_setup_dmar_msi(unsigned int irq)
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if (ret < 0)
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return ret;
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dmar_msi_write(irq, &msg);
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set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
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"edge");
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irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
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"edge");
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return 0;
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}
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#endif
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@ -3474,13 +3476,13 @@ int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
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if (ret < 0)
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return ret;
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hpet_msi_write(get_irq_data(irq), &msg);
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hpet_msi_write(irq_get_handler_data(irq), &msg);
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irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
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if (irq_remapped(get_irq_chip_data(irq)))
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set_irq_chip_and_handler_name(irq, &ir_hpet_msi_type,
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if (irq_remapped(irq_get_chip_data(irq)))
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irq_set_chip_and_handler_name(irq, &ir_hpet_msi_type,
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handle_edge_irq, "edge");
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else
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set_irq_chip_and_handler_name(irq, &hpet_msi_type,
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irq_set_chip_and_handler_name(irq, &hpet_msi_type,
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handle_edge_irq, "edge");
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return 0;
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@ -3569,7 +3571,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
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write_ht_irq_msg(irq, &msg);
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set_irq_chip_and_handler_name(irq, &ht_irq_chip,
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irq_set_chip_and_handler_name(irq, &ht_irq_chip,
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handle_edge_irq, "edge");
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dev_printk(KERN_DEBUG, &dev->dev, "irq %d for HT\n", irq);
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@ -4054,5 +4056,6 @@ void __init pre_init_apic_IRQ0(void)
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setup_local_APIC();
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io_apic_setup_irq_pin(0, 0, &attr);
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set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge");
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irq_set_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq,
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"edge");
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}
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@ -503,7 +503,7 @@ static int hpet_assign_irq(struct hpet_dev *dev)
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if (!irq)
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return -EINVAL;
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set_irq_data(irq, dev);
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irq_set_handler_data(irq, dev);
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if (hpet_setup_msi_irq(irq))
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return -EINVAL;
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@ -112,7 +112,7 @@ static void make_8259A_irq(unsigned int irq)
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{
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disable_irq_nosync(irq);
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io_apic_irqs &= ~(1<<irq);
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set_irq_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq,
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irq_set_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq,
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i8259A_chip.name);
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enable_irq(irq);
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}
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@ -110,7 +110,7 @@ void __init init_ISA_irqs(void)
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legacy_pic->init(0);
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for (i = 0; i < legacy_pic->nr_legacy_irqs; i++)
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set_irq_chip_and_handler_name(i, chip, handle_level_irq, name);
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irq_set_chip_and_handler_name(i, chip, handle_level_irq, name);
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}
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void __init init_IRQ(void)
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@ -847,7 +847,7 @@ static void __init lguest_init_IRQ(void)
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void lguest_setup_irq(unsigned int irq)
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{
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irq_alloc_desc_at(irq, 0);
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set_irq_chip_and_handler_name(irq, &lguest_irq_controller,
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irq_set_chip_and_handler_name(irq, &lguest_irq_controller,
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handle_level_irq, "level");
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}
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@ -995,7 +995,7 @@ static void lguest_time_irq(unsigned int irq, struct irq_desc *desc)
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static void lguest_time_init(void)
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{
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/* Set up the timer interrupt (0) to go to our simple timer routine */
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set_irq_handler(0, lguest_time_irq);
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irq_set_handler(0, lguest_time_irq);
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clocksource_register(&lguest_clock);
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@ -104,7 +104,7 @@ static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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"msi-x" : "msi", &irq, &pirq, XEN_ALLOC_IRQ);
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if (irq < 0)
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goto error;
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ret = set_irq_msi(irq, msidesc);
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ret = irq_set_msi_desc(irq, msidesc);
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if (ret < 0)
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goto error_while;
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printk(KERN_DEBUG "xen: msi already setup: msi --> irq=%d"
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@ -117,7 +117,7 @@ static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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goto error;
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printk(KERN_DEBUG "xen: msi --> irq=%d, pirq=%d\n", irq, pirq);
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xen_msi_compose_msg(dev, pirq, &msg);
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ret = set_irq_msi(irq, msidesc);
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ret = irq_set_msi_desc(irq, msidesc);
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if (ret < 0)
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goto error_while;
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write_msi_msg(irq, &msg);
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@ -165,7 +165,7 @@ static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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goto free;
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}
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ret = set_irq_msi(irq, msidesc);
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ret = irq_set_msi_desc(irq, msidesc);
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if (ret)
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goto error_while;
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i++;
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@ -210,7 +210,7 @@ static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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if (irq < 0)
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return -1;
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ret = set_irq_msi(irq, msidesc);
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ret = irq_set_msi_desc(irq, msidesc);
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if (ret)
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goto error;
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}
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@ -131,7 +131,7 @@ arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
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unsigned long mmr_offset, int limit)
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{
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const struct cpumask *eligible_cpu = cpumask_of(cpu);
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struct irq_cfg *cfg = get_irq_chip_data(irq);
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struct irq_cfg *cfg = irq_get_chip_data(irq);
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unsigned long mmr_value;
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struct uv_IO_APIC_route_entry *entry;
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int mmr_pnode, err;
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@ -148,7 +148,7 @@ arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
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else
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irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
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set_irq_chip_and_handler_name(irq, &uv_irq_chip, handle_percpu_irq,
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irq_set_chip_and_handler_name(irq, &uv_irq_chip, handle_percpu_irq,
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irq_name);
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mmr_value = 0;
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@ -606,7 +606,7 @@ static void __init visws_pre_intr_init(void)
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chip = &cobalt_irq_type;
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if (chip)
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set_irq_chip(i, chip);
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irq_set_chip(i, chip);
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}
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setup_irq(CO_IRQ_8259, &master_action);
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