forked from luck/tmp_suning_uos_patched
ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP
The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO in RC mode. However in EP mode, the host system is not able to access the MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -524,7 +524,7 @@ static struct clockdomain pcie_7xx_clkdm = {
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.dep_bit = DRA7XX_PCIE_STATDEP_SHIFT,
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.wkdep_srcs = pcie_wkup_sleep_deps,
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.sleepdep_srcs = pcie_wkup_sleep_deps,
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.flags = CLKDM_CAN_HWSUP_SWSUP,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain atl_7xx_clkdm = {
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