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ARM: dts: add display power domain for exynos5250

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The patch adds domain definition and references to it in appropriate devices.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
[mszyprow: rebased onto generic power domains dt bindings]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This commit is contained in:
Andrzej Hajda 2015-02-04 23:44:16 +09:00 committed by Kukjin Kim
parent c950ea6807
commit 2d2c9a8d0a
1 changed files with 10 additions and 0 deletions
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10
arch/arm/boot/dts/exynos5250.dtsi
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@ -105,6 +105,12 @@ pd_mfc: mfc-power-domain@10044040 {
#power-domain-cells = <0>; #power-domain-cells = <0>;
}; };
pd_disp1: disp1-power-domain@100440A0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100440A0 0x20>;
#power-domain-cells = <0>;
};
clock: clock-controller@10010000 { clock: clock-controller@10010000 {
compatible = "samsung,exynos5250-clock"; compatible = "samsung,exynos5250-clock";
reg = <0x10010000 0x30000>; reg = <0x10010000 0x30000>;
@ -742,6 +748,7 @@ gsc_3: gsc@13e30000 {
hdmi: hdmi { hdmi: hdmi {
compatible = "samsung,exynos4212-hdmi"; compatible = "samsung,exynos4212-hdmi";
reg = <0x14530000 0x70000>; reg = <0x14530000 0x70000>;
power-domains = <&pd_disp1>;
interrupts = <0 95 0>; interrupts = <0 95 0>;
clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
<&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
@ -754,6 +761,7 @@ hdmi: hdmi {
mixer { mixer {
compatible = "samsung,exynos5250-mixer"; compatible = "samsung,exynos5250-mixer";
reg = <0x14450000 0x10000>; reg = <0x14450000 0x10000>;
power-domains = <&pd_disp1>;
interrupts = <0 94 0>; interrupts = <0 94 0>;
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
<&clock CLK_SCLK_HDMI>; <&clock CLK_SCLK_HDMI>;
@ -767,6 +775,7 @@ dp_phy: video-phy@10040720 {
}; };
dp: dp-controller@145B0000 { dp: dp-controller@145B0000 {
power-domains = <&pd_disp1>;
clocks = <&clock CLK_DP>; clocks = <&clock CLK_DP>;
clock-names = "dp"; clock-names = "dp";
phys = <&dp_phy>; phys = <&dp_phy>;
@ -774,6 +783,7 @@ dp: dp-controller@145B0000 {
}; };
fimd: fimd@14400000 { fimd: fimd@14400000 {
power-domains = <&pd_disp1>;
clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
clock-names = "sclk_fimd", "fimd"; clock-names = "sclk_fimd", "fimd";
}; };