forked from luck/tmp_suning_uos_patched
PCI/portdrv: Use PCI Express Capability accessors
Use PCI Express Capability access functions to simplify portdrv. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
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@ -246,8 +246,7 @@ static void cleanup_service_irqs(struct pci_dev *dev)
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*/
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static int get_port_device_capability(struct pci_dev *dev)
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{
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int services = 0, pos;
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u16 reg16;
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int services = 0;
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u32 reg32;
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int cap_mask = 0;
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int err;
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@ -265,11 +264,9 @@ static int get_port_device_capability(struct pci_dev *dev)
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return 0;
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}
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pos = pci_pcie_cap(dev);
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pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16);
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/* Hot-Plug Capable */
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if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) {
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pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, ®32);
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if (cap_mask & PCIE_PORT_SERVICE_HP) {
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pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32);
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if (reg32 & PCI_EXP_SLTCAP_HPC) {
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services |= PCIE_PORT_SERVICE_HP;
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/*
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@ -277,10 +274,8 @@ static int get_port_device_capability(struct pci_dev *dev)
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* enabled by the BIOS and the hot-plug service driver
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* is not loaded.
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*/
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pos += PCI_EXP_SLTCTL;
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pci_read_config_word(dev, pos, ®16);
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reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
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pci_write_config_word(dev, pos, reg16);
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pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
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PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
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}
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}
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/* AER capable */
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@ -64,14 +64,7 @@ __setup("pcie_ports=", pcie_port_setup);
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*/
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void pcie_clear_root_pme_status(struct pci_dev *dev)
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{
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int rtsta_pos;
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u32 rtsta;
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rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
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pci_read_config_dword(dev, rtsta_pos, &rtsta);
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rtsta |= PCI_EXP_RTSTA_PME;
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pci_write_config_dword(dev, rtsta_pos, rtsta);
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pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
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}
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static int pcie_portdrv_restore_config(struct pci_dev *dev)
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