forked from luck/tmp_suning_uos_patched
V4L/DVB (11879): Adds support for Leadtek WinFast DTV-1800H
Enables analog/digital tv, radio and remote control (gpio). Tested-by: Marcin Wojcikowski <emtees.mts@gmail.com> Tested-by: Karel Juhanak <karel.juhanak@warnet.cz> Tested-by: Andrew Goff <goffa72@gmail.com> Tested-by: Jan Novak <novak-j@seznam.cz> Signed-off-by: Miroslav Sustek <sustmidown@centrum.cz> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -79,3 +79,4 @@
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78 -> Prof 6200 DVB-S [b022:3022]
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79 -> Terratec Cinergy HT PCI MKII [153b:1177]
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80 -> Hauppauge WinTV-IR Only [0070:9290]
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81 -> Leadtek WinFast DTV1800 Hybrid [107d:6654]
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@ -1976,6 +1976,47 @@ static const struct cx88_board cx88_boards[] = {
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.tuner_addr = ADDR_UNSET,
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.radio_addr = ADDR_UNSET,
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},
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[CX88_BOARD_WINFAST_DTV1800H] = {
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.name = "Leadtek WinFast DTV1800 Hybrid",
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.tuner_type = TUNER_XC2028,
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.radio_type = TUNER_XC2028,
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.tuner_addr = 0x61,
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.radio_addr = 0x61,
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/*
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* GPIO setting
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*
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* 2: mute (0=off,1=on)
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* 12: tuner reset pin
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* 13: audio source (0=tuner audio,1=line in)
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* 14: FM (0=on,1=off ???)
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*/
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.input = {{
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.type = CX88_VMUX_TELEVISION,
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.vmux = 0,
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.gpio0 = 0x0400, /* pin 2 = 0 */
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.gpio1 = 0x6040, /* pin 13 = 0, pin 14 = 1 */
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.gpio2 = 0x0000,
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}, {
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.type = CX88_VMUX_COMPOSITE1,
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.vmux = 1,
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.gpio0 = 0x0400, /* pin 2 = 0 */
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.gpio1 = 0x6060, /* pin 13 = 1, pin 14 = 1 */
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.gpio2 = 0x0000,
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}, {
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.type = CX88_VMUX_SVIDEO,
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.vmux = 2,
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.gpio0 = 0x0400, /* pin 2 = 0 */
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.gpio1 = 0x6060, /* pin 13 = 1, pin 14 = 1 */
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.gpio2 = 0x0000,
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} },
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.radio = {
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.type = CX88_RADIO,
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.gpio0 = 0x0400, /* pin 2 = 0 */
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.gpio1 = 0x6000, /* pin 13 = 0, pin 14 = 0 */
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.gpio2 = 0x0000,
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},
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.mpeg = CX88_MPEG_DVB,
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},
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};
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/* ------------------------------------------------------------------ */
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@ -2393,6 +2434,10 @@ static const struct cx88_subid cx88_subids[] = {
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.subvendor = 0x0070,
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.subdevice = 0x9290,
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.card = CX88_BOARD_HAUPPAUGE_IRONLY,
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}, {
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.subvendor = 0x107d,
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.subdevice = 0x6654,
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.card = CX88_BOARD_WINFAST_DTV1800H,
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},
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};
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@ -2591,6 +2636,23 @@ static int cx88_xc3028_geniatech_tuner_callback(struct cx88_core *core,
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return -EINVAL;
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}
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static int cx88_xc3028_winfast1800h_callback(struct cx88_core *core,
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int command, int arg)
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{
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switch (command) {
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case XC2028_TUNER_RESET:
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/* GPIO 12 (xc3028 tuner reset) */
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cx_set(MO_GP1_IO, 0x1010);
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mdelay(50);
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cx_clear(MO_GP1_IO, 0x10);
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mdelay(50);
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cx_set(MO_GP1_IO, 0x10);
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mdelay(50);
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return 0;
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}
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return -EINVAL;
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}
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/* ------------------------------------------------------------------- */
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/* some Divco specific stuff */
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static int cx88_pv_8000gt_callback(struct cx88_core *core,
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@ -2663,6 +2725,8 @@ static int cx88_xc2028_tuner_callback(struct cx88_core *core,
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case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
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case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
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return cx88_dvico_xc2028_callback(core, command, arg);
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case CX88_BOARD_WINFAST_DTV1800H:
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return cx88_xc3028_winfast1800h_callback(core, command, arg);
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}
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switch (command) {
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@ -2849,6 +2913,16 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core)
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cx_set(MO_GP0_IO, 0x00000080); /* 702 out of reset */
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udelay(1000);
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break;
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case CX88_BOARD_WINFAST_DTV1800H:
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/* GPIO 12 (xc3028 tuner reset) */
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cx_set(MO_GP1_IO, 0x1010);
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mdelay(50);
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cx_clear(MO_GP1_IO, 0x10);
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mdelay(50);
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cx_set(MO_GP1_IO, 0x10);
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mdelay(50);
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break;
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}
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}
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@ -2869,6 +2943,7 @@ void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl)
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core->i2c_algo.udelay = 16;
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break;
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case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
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case CX88_BOARD_WINFAST_DTV1800H:
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ctl->demod = XC3028_FE_ZARLINK456;
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break;
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case CX88_BOARD_KWORLD_ATSC_120:
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@ -1014,6 +1014,7 @@ static int dvb_register(struct cx8802_dev *dev)
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}
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break;
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case CX88_BOARD_PINNACLE_HYBRID_PCTV:
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case CX88_BOARD_WINFAST_DTV1800H:
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fe0->dvb.frontend = dvb_attach(zl10353_attach,
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&cx88_pinnacle_hybrid_pctv,
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&core->i2c_adap);
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@ -91,6 +91,7 @@ static void cx88_ir_handle_key(struct cx88_IR *ir)
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gpio=(gpio & 0x7fd) + (auxgpio & 0xef);
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break;
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case CX88_BOARD_WINFAST_DTV1000:
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case CX88_BOARD_WINFAST_DTV1800H:
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case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
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gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900);
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auxgpio = gpio;
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@ -224,6 +225,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
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ir->sampling = 1;
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break;
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case CX88_BOARD_WINFAST_DTV2000H:
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case CX88_BOARD_WINFAST_DTV1800H:
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ir_codes = ir_codes_winfast;
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ir->gpio_addr = MO_GP0_IO;
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ir->mask_keycode = 0x8f8;
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@ -233,6 +233,7 @@ extern struct sram_channel cx88_sram_channels[];
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#define CX88_BOARD_PROF_6200 78
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#define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79
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#define CX88_BOARD_HAUPPAUGE_IRONLY 80
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#define CX88_BOARD_WINFAST_DTV1800H 81
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enum cx88_itype {
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CX88_VMUX_COMPOSITE1 = 1,
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