forked from luck/tmp_suning_uos_patched
[MIPS] TXx9: PCI fixes for tx3927/tx4927
* Fix tx3927 pci ops for Type-1 configuration * Fix abort checking of tx3927 pci ops * Flush write buffer to avoid spurious PCI error interrupt * Add a quirk for FPCIB backplane Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -41,41 +41,41 @@
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#include <asm/addrspace.h>
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#include <asm/txx9/tx3927.h>
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static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
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unsigned char where)
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static int mkaddr(struct pci_bus *bus, unsigned char devfn, unsigned char where)
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{
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if (bus == 0 && dev_fn >= PCI_DEVFN(TX3927_PCIC_MAX_DEVNU, 0))
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return PCIBIOS_DEVICE_NOT_FOUND;
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tx3927_pcicptr->ica = ((bus & 0xff) << 0x10) |
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((dev_fn & 0xff) << 0x08) |
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(where & 0xfc);
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if (bus->parent == NULL &&
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devfn >= PCI_DEVFN(TX3927_PCIC_MAX_DEVNU, 0))
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return -1;
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tx3927_pcicptr->ica =
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((bus->number & 0xff) << 0x10) |
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((devfn & 0xff) << 0x08) |
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(where & 0xfc) | (bus->parent ? 1 : 0);
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/* clear M_ABORT and Disable M_ABORT Int. */
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tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
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tx3927_pcicptr->pcistatim &= ~PCI_STATUS_REC_MASTER_ABORT;
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return PCIBIOS_SUCCESSFUL;
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return 0;
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}
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static inline int check_abort(void)
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{
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if (tx3927_pcicptr->pcistat & PCI_STATUS_REC_MASTER_ABORT)
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if (tx3927_pcicptr->pcistat & PCI_STATUS_REC_MASTER_ABORT) {
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tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
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tx3927_pcicptr->pcistatim |= PCI_STATUS_REC_MASTER_ABORT;
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/* flush write buffer */
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iob();
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int tx3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 * val)
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{
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int ret;
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ret = mkaddr(bus->number, devfn, where);
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if (ret)
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return ret;
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if (mkaddr(bus, devfn, where)) {
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*val = 0xffffffff;
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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switch (size) {
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case 1:
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@ -97,11 +97,8 @@ static int tx3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
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static int tx3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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int ret;
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ret = mkaddr(bus->number, devfn, where);
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if (ret)
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return ret;
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if (mkaddr(bus, devfn, where))
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return PCIBIOS_DEVICE_NOT_FOUND;
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switch (size) {
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case 1:
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@ -117,11 +114,6 @@ static int tx3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
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tx3927_pcicptr->icd = cpu_to_le32(val);
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}
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if (tx3927_pcicptr->pcistat & PCI_STATUS_REC_MASTER_ABORT)
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tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
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tx3927_pcicptr->pcistatim |= PCI_STATUS_REC_MASTER_ABORT;
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return PCIBIOS_DEVICE_NOT_FOUND;
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return check_abort();
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}
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@ -85,6 +85,8 @@ static int check_abort(struct tx4927_pcic_reg __iomem *pcicptr)
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__raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
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| (PCI_STATUS_REC_MASTER_ABORT << 16),
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&pcicptr->pcistatus);
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/* flush write buffer */
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iob();
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code = PCIBIOS_DEVICE_NOT_FOUND;
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}
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return code;
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@ -406,3 +408,35 @@ void tx4927_report_pcic_status(void)
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tx4927_report_pcic_status1(pcicptrs[i].pcicptr);
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}
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}
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#ifdef CONFIG_TOSHIBA_FPCIB0
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static void __init tx4927_quirk_slc90e66_bridge(struct pci_dev *dev)
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{
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struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(dev->bus);
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if (!pcicptr)
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return;
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if (__raw_readl(&pcicptr->pbacfg) & TX4927_PCIC_PBACFG_PBAEN) {
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/* Reset Bus Arbiter */
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__raw_writel(TX4927_PCIC_PBACFG_RPBA, &pcicptr->pbacfg);
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/*
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* swap reqBP and reqXP (raise priority of SLC90E66).
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* SLC90E66(PCI-ISA bridge) is connected to REQ2 on
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* PCI Backplane board.
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*/
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__raw_writel(0x72543610, &pcicptr->pbareqport);
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__raw_writel(0, &pcicptr->pbabm);
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/* Use Fixed ParkMaster (required by SLC90E66) */
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__raw_writel(TX4927_PCIC_PBACFG_FIXPA, &pcicptr->pbacfg);
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/* Enable Bus Arbiter */
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__raw_writel(TX4927_PCIC_PBACFG_FIXPA |
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TX4927_PCIC_PBACFG_PBAEN,
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&pcicptr->pbacfg);
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printk(KERN_INFO "PCI: Use Fixed Park Master (REQPORT %08x)\n",
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__raw_readl(&pcicptr->pbareqport));
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}
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}
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#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_0,
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tx4927_quirk_slc90e66_bridge);
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#endif
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