forked from luck/tmp_suning_uos_patched
powerpc fixes for 5.10 #5
Three commits fixing possible missed TLB invalidations for multi-threaded processes when CPUs are hotplugged in and out. A fix for a host crash triggerable by host userspace (qemu) in KVM on Power9. A fix for a host crash in machine check handling when running HPT guests on a HPT host. One commit fixing potential missed TLB invalidations when using the hash MMU on Power9 or later. A regression fix for machines with CPUs on node 0 but no memory. Thanks to: Aneesh Kumar K.V, Cédric Le Goater, Greg Kurz, Milan Mohanty, Milton Miller, Nicholas Piggin, Paul Mackerras, Srikar Dronamraju. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEJFGtCPCthwEv2Y/bUevqPMjhpYAFAl/LcwsTHG1wZUBlbGxl cm1hbi5pZC5hdQAKCRBR6+o8yOGlgOeiD/wKGX8eE7AJ5ZxoFLwpGEJhp9QgMDhe nP82CkKobwMM3UCbde9MC8PqYGC7/7PhRPM0GI03uh6EfeHUtle7AZlBAlZoGaeJ MwdQBQrZSqf1QJOyhUEa6CI0XTfCEOrsw+AkZQKdsv9JLcFBz7IyfP61gf7MHfyo QKlfYYilXHbJ7M9oiM9gKUdtrpPfMGH0YnIp0FR+JowJAWUfFY626H9j7chNwWK+ 7nrphtLHwsBVNtIoKWvPocuLKPsziOqXWnOP/do/RuCoKXMbGjtOJHhUgEYC5PM7 eQug43YDaws4K1fxaHvQto/u92nL2GFY6FfKNeJ5FcQYgCIvi/T8jzEsJyqGbpVz YihZj1MbhhGr/neVtJW4SbdCTCU7R7X9QBy4He6XoWHR0fNoQDQvjNT/ziiuHiN0 tU+Y9aoHwI/0Pb44ceiQ/T10nxYtk+6Cj5Cm9Ll7MvfjUsE/BpxlYdi+KMqRSGOb itOwFLQpgy28feMRKGZNKFURwTophASFaKO88yhjeSnlcGqxvicSIUpz8UD1jxwt o/tsger09ZXqBYVdVKLpqbKsifVbzUfJmmycvuDF37B+VjwHACP+VZltwdOqnX13 BM9ndcDW2p6UnNLfs47FWJM+czmShrgwqI/W7qcCFleYL3r5XOS8hJHfgvJEcE04 n7A9cNvK5q6nvg== =tIAZ -----END PGP SIGNATURE----- Merge tag 'powerpc-5.10-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: "Some more powerpc fixes for 5.10: - Three commits fixing possible missed TLB invalidations for multi-threaded processes when CPUs are hotplugged in and out. - A fix for a host crash triggerable by host userspace (qemu) in KVM on Power9. - A fix for a host crash in machine check handling when running HPT guests on a HPT host. - One commit fixing potential missed TLB invalidations when using the hash MMU on Power9 or later. - A regression fix for machines with CPUs on node 0 but no memory. Thanks to Aneesh Kumar K.V, Cédric Le Goater, Greg Kurz, Milan Mohanty, Milton Miller, Nicholas Piggin, Paul Mackerras, and Srikar Dronamraju" * tag 'powerpc-5.10-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/64s/powernv: Fix memory corruption when saving SLB entries on MCE KVM: PPC: Book3S HV: XIVE: Fix vCPU id sanity check powerpc/numa: Fix a regression on memoryless node 0 powerpc/64s: Trim offlined CPUs from mm_cpumasks kernel/cpu: add arch override for clear_tasks_mm_cpumask() mm handling powerpc/64s/pseries: Fix hash tlbiel_all_isa300 for guest kernels powerpc/64s: Fix hash ISA v3.0 TLBIEL instruction generation
This commit is contained in:
commit
32f741b02f
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@ -242,6 +242,18 @@ extern void radix_init_pseries(void);
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static inline void radix_init_pseries(void) { };
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#endif
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#ifdef CONFIG_HOTPLUG_CPU
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#define arch_clear_mm_cpumask_cpu(cpu, mm) \
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do { \
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if (cpumask_test_cpu(cpu, mm_cpumask(mm))) { \
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atomic_dec(&(mm)->context.active_cpus); \
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cpumask_clear_cpu(cpu, mm_cpumask(mm)); \
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} \
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} while (0)
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void cleanup_cpu_mmu_context(void);
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#endif
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static inline int get_user_context(mm_context_t *ctx, unsigned long ea)
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{
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int index = ea >> MAX_EA_BITS_PER_CONTEXT;
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@ -1214,12 +1214,9 @@ void kvmppc_xive_cleanup_vcpu(struct kvm_vcpu *vcpu)
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static bool kvmppc_xive_vcpu_id_valid(struct kvmppc_xive *xive, u32 cpu)
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{
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/* We have a block of xive->nr_servers VPs. We just need to check
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* raw vCPU ids are below the expected limit for this guest's
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* core stride ; kvmppc_pack_vcpu_id() will pack them down to an
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* index that can be safely used to compute a VP id that belongs
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* to the VP block.
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* packed vCPU ids are below that.
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*/
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return cpu < xive->nr_servers * xive->kvm->arch.emul_smt_mode;
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return kvmppc_pack_vcpu_id(xive->kvm, cpu) < xive->nr_servers;
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}
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int kvmppc_xive_compute_vp_id(struct kvmppc_xive *xive, u32 cpu, u32 *vp)
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@ -68,7 +68,7 @@ static __always_inline void tlbiel_hash_set_isa300(unsigned int set, unsigned in
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rs = ((unsigned long)pid << PPC_BITLSHIFT(31));
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asm volatile(PPC_TLBIEL(%0, %1, %2, %3, %4)
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: : "r"(rb), "r"(rs), "i"(ric), "i"(prs), "r"(r)
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: : "r"(rb), "r"(rs), "i"(ric), "i"(prs), "i"(r)
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: "memory");
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}
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@ -92,16 +92,15 @@ static void tlbiel_all_isa300(unsigned int num_sets, unsigned int is)
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asm volatile("ptesync": : :"memory");
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/*
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* Flush the first set of the TLB, and any caching of partition table
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* entries. Then flush the remaining sets of the TLB. Hash mode uses
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* partition scoped TLB translations.
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* Flush the partition table cache if this is HV mode.
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*/
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tlbiel_hash_set_isa300(0, is, 0, 2, 0);
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for (set = 1; set < num_sets; set++)
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tlbiel_hash_set_isa300(set, is, 0, 0, 0);
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if (early_cpu_has_feature(CPU_FTR_HVMODE))
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tlbiel_hash_set_isa300(0, is, 0, 2, 0);
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/*
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* Now invalidate the process table cache.
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* Now invalidate the process table cache. UPRT=0 HPT modes (what
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* current hardware implements) do not use the process table, but
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* add the flushes anyway.
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*
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* From ISA v3.0B p. 1078:
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* The following forms are invalid.
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@ -110,6 +109,14 @@ static void tlbiel_all_isa300(unsigned int num_sets, unsigned int is)
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*/
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tlbiel_hash_set_isa300(0, is, 0, 2, 1);
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/*
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* Then flush the sets of the TLB proper. Hash mode uses
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* partition scoped TLB translations, which may be flushed
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* in !HV mode.
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*/
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for (set = 0; set < num_sets; set++)
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tlbiel_hash_set_isa300(set, is, 0, 0, 0);
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ppc_after_tlbiel_barrier();
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asm volatile(PPC_ISA_3_0_INVALIDATE_ERAT "; isync" : : :"memory");
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@ -17,6 +17,7 @@
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#include <linux/export.h>
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#include <linux/gfp.h>
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#include <linux/slab.h>
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#include <linux/cpu.h>
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#include <asm/mmu_context.h>
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#include <asm/pgalloc.h>
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@ -307,3 +308,22 @@ void radix__switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
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isync();
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}
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#endif
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/**
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* cleanup_cpu_mmu_context - Clean up MMU details for this CPU (newly offlined)
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*
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* This clears the CPU from mm_cpumask for all processes, and then flushes the
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* local TLB to ensure TLB coherency in case the CPU is onlined again.
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*
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* KVM guest translations are not necessarily flushed here. If KVM started
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* using mm_cpumask or the Linux APIs which do, this would have to be resolved.
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*/
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#ifdef CONFIG_HOTPLUG_CPU
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void cleanup_cpu_mmu_context(void)
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{
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int cpu = smp_processor_id();
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clear_tasks_mm_cpumask(cpu);
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tlbiel_all();
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}
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#endif
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@ -742,8 +742,7 @@ static int __init parse_numa_properties(void)
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of_node_put(cpu);
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}
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if (likely(nid > 0))
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node_set_online(nid);
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node_set_online(nid);
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}
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get_n_mem_cells(&n_mem_addr_cells, &n_mem_size_cells);
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@ -911,6 +911,8 @@ static int smp_core99_cpu_disable(void)
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mpic_cpu_set_priority(0xf);
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cleanup_cpu_mmu_context();
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return 0;
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}
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@ -211,11 +211,16 @@ static void __init pnv_init(void)
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add_preferred_console("hvc", 0, NULL);
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if (!radix_enabled()) {
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size_t size = sizeof(struct slb_entry) * mmu_slb_size;
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int i;
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/* Allocate per cpu area to save old slb contents during MCE */
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for_each_possible_cpu(i)
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paca_ptrs[i]->mce_faulty_slbs = memblock_alloc_node(mmu_slb_size, __alignof__(*paca_ptrs[i]->mce_faulty_slbs), cpu_to_node(i));
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for_each_possible_cpu(i) {
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paca_ptrs[i]->mce_faulty_slbs =
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memblock_alloc_node(size,
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__alignof__(struct slb_entry),
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cpu_to_node(i));
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}
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}
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}
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@ -143,6 +143,9 @@ static int pnv_smp_cpu_disable(void)
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xive_smp_disable_cpu();
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else
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xics_migrate_irqs_away();
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cleanup_cpu_mmu_context();
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return 0;
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}
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@ -90,6 +90,9 @@ static int pseries_cpu_disable(void)
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xive_smp_disable_cpu();
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else
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xics_migrate_irqs_away();
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cleanup_cpu_mmu_context();
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return 0;
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}
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@ -815,6 +815,10 @@ void __init cpuhp_threads_init(void)
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}
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#ifdef CONFIG_HOTPLUG_CPU
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#ifndef arch_clear_mm_cpumask_cpu
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#define arch_clear_mm_cpumask_cpu(cpu, mm) cpumask_clear_cpu(cpu, mm_cpumask(mm))
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#endif
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/**
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* clear_tasks_mm_cpumask - Safely clear tasks' mm_cpumask for a CPU
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* @cpu: a CPU id
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@ -850,7 +854,7 @@ void clear_tasks_mm_cpumask(int cpu)
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t = find_lock_task_mm(p);
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if (!t)
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continue;
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cpumask_clear_cpu(cpu, mm_cpumask(t->mm));
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arch_clear_mm_cpumask_cpu(cpu, t->mm);
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task_unlock(t);
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}
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rcu_read_unlock();
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