forked from luck/tmp_suning_uos_patched
fpga zynq: Fix incorrect ISR state on bootup
It is best practice to clear and mask all interrupts before associating the IRQ, and this should be done after the clock is enabled. This corrects a bad result from zynq_fpga_ops_state on bootup where left over latched values in INT_STS_OFFSET caused it to report an unconfigured FPGA as configured. After this change the boot up operating state for an unconfigured FPGA reports 'unknown'. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Acked-by: Alan Tull <atull@opensource.altera.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
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340c0c53ea
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@ -437,13 +437,6 @@ static int zynq_fpga_probe(struct platform_device *pdev)
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return priv->irq;
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return priv->irq;
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}
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}
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err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0,
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dev_name(dev), priv);
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if (err) {
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dev_err(dev, "unable to request IRQ\n");
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return err;
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}
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priv->clk = devm_clk_get(dev, "ref_clk");
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priv->clk = devm_clk_get(dev, "ref_clk");
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if (IS_ERR(priv->clk)) {
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if (IS_ERR(priv->clk)) {
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dev_err(dev, "input clock not found\n");
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dev_err(dev, "input clock not found\n");
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@ -459,6 +452,16 @@ static int zynq_fpga_probe(struct platform_device *pdev)
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/* unlock the device */
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/* unlock the device */
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zynq_fpga_write(priv, UNLOCK_OFFSET, UNLOCK_MASK);
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zynq_fpga_write(priv, UNLOCK_OFFSET, UNLOCK_MASK);
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zynq_fpga_write(priv, INT_MASK_OFFSET, 0xFFFFFFFF);
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zynq_fpga_write(priv, INT_STS_OFFSET, IXR_ALL_MASK);
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err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0, dev_name(dev),
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priv);
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if (err) {
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dev_err(dev, "unable to request IRQ\n");
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clk_disable_unprepare(priv->clk);
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return err;
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}
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clk_disable(priv->clk);
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clk_disable(priv->clk);
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err = fpga_mgr_register(dev, "Xilinx Zynq FPGA Manager",
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err = fpga_mgr_register(dev, "Xilinx Zynq FPGA Manager",
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