forked from luck/tmp_suning_uos_patched
Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel: drm/i915/dvo: Report LVDS attached to ch701x as connected Revert "drm/i915/bios: Reverse order of 100/120 Mhz SSC clocks" drm/i915: Verify Ironlake eDP presence on DP_A using the capability fuse drm/i915, intel_ips: When i915 loads after IPS, make IPS relink to i915. drm/i915/sdvo: Add hdmi connector properties after initing the connector drm/i915: Set the required VFMUNIT clock gating disable on Ironlake.
This commit is contained in:
commit
3643e0e87c
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@ -242,7 +242,7 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
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static enum drm_connector_status ch7017_detect(struct intel_dvo_device *dvo)
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{
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return connector_status_unknown;
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return connector_status_connected;
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}
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static enum drm_mode_status ch7017_mode_valid(struct intel_dvo_device *dvo,
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@ -34,6 +34,7 @@
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#include "i915_drm.h"
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#include "i915_drv.h"
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#include "i915_trace.h"
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#include "../../../platform/x86/intel_ips.h"
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#include <linux/pci.h>
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#include <linux/vgaarb.h>
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#include <linux/acpi.h>
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@ -1870,6 +1871,26 @@ bool i915_gpu_turbo_disable(void)
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}
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EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);
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/**
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* Tells the intel_ips driver that the i915 driver is now loaded, if
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* IPS got loaded first.
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*
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* This awkward dance is so that neither module has to depend on the
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* other in order for IPS to do the appropriate communication of
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* GPU turbo limits to i915.
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*/
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static void
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ips_ping_for_i915_load(void)
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{
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void (*link)(void);
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link = symbol_get(ips_link_to_i915_driver);
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if (link) {
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link();
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symbol_put(ips_link_to_i915_driver);
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}
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}
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/**
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* i915_driver_load - setup chip and create an initial config
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* @dev: DRM device
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@ -2075,6 +2096,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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dev_priv->mchdev_lock = &mchdev_lock;
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spin_unlock(&mchdev_lock);
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ips_ping_for_i915_load();
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return 0;
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out_workqueue_free:
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@ -2471,6 +2471,9 @@
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# define MARIUNIT_CLOCK_GATE_DISABLE (1 << 18)
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# define SVSMUNIT_CLOCK_GATE_DISABLE (1 << 1)
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#define PCH_3DCGDIS1 0x46024
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# define VFMUNIT_CLOCK_GATE_DISABLE (1 << 11)
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#define FDI_PLL_FREQ_CTL 0x46030
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#define FDI_PLL_FREQ_CHANGE_REQUEST (1<<24)
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#define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00
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@ -2588,6 +2591,13 @@
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#define ILK_DISPLAY_CHICKEN2 0x42004
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#define ILK_DPARB_GATE (1<<22)
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#define ILK_VSDPFD_FULL (1<<21)
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#define ILK_DISPLAY_CHICKEN_FUSES 0x42014
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#define ILK_INTERNAL_GRAPHICS_DISABLE (1<<31)
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#define ILK_INTERNAL_DISPLAY_DISABLE (1<<30)
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#define ILK_DISPLAY_DEBUG_DISABLE (1<<29)
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#define ILK_HDCP_DISABLE (1<<25)
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#define ILK_eDP_A_DISABLE (1<<24)
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#define ILK_DESKTOP (1<<23)
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#define ILK_DSPCLK_GATE 0x42020
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#define ILK_DPARB_CLK_GATE (1<<5)
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/* According to spec this bit 7/8/9 of 0x42020 should be set to enable FBC */
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@ -270,7 +270,7 @@ parse_general_features(struct drm_i915_private *dev_priv,
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general->ssc_freq ? 66 : 48;
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else if (IS_GEN5(dev) || IS_GEN6(dev))
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dev_priv->lvds_ssc_freq =
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general->ssc_freq ? 120 : 100;
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general->ssc_freq ? 100 : 120;
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else
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dev_priv->lvds_ssc_freq =
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general->ssc_freq ? 100 : 96;
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@ -5379,6 +5379,23 @@ static int intel_encoder_clones(struct drm_device *dev, int type_mask)
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return index_mask;
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}
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static bool has_edp_a(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (!IS_MOBILE(dev))
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return false;
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if ((I915_READ(DP_A) & DP_DETECTED) == 0)
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return false;
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if (IS_GEN5(dev) &&
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(I915_READ(ILK_DISPLAY_CHICKEN_FUSES) & ILK_eDP_A_DISABLE))
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return false;
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return true;
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}
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static void intel_setup_outputs(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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@ -5396,7 +5413,7 @@ static void intel_setup_outputs(struct drm_device *dev)
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if (HAS_PCH_SPLIT(dev)) {
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dpd_is_edp = intel_dpd_is_edp(dev);
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if (IS_MOBILE(dev) && (I915_READ(DP_A) & DP_DETECTED))
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if (has_edp_a(dev))
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intel_dp_init(dev, DP_A);
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if (dpd_is_edp && (I915_READ(PCH_DP_D) & DP_DETECTED))
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@ -5825,6 +5842,8 @@ void intel_init_clock_gating(struct drm_device *dev)
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I915_WRITE(PCH_3DCGDIS0,
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MARIUNIT_CLOCK_GATE_DISABLE |
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SVSMUNIT_CLOCK_GATE_DISABLE);
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I915_WRITE(PCH_3DCGDIS1,
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VFMUNIT_CLOCK_GATE_DISABLE);
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}
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I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);
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@ -2040,13 +2040,14 @@ intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
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SDVO_COLORIMETRY_RGB256);
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connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
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intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
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intel_sdvo->is_hdmi = true;
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}
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intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
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(1 << INTEL_ANALOG_CLONE_BIT));
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intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
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if (intel_sdvo->is_hdmi)
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intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
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return true;
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}
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@ -75,6 +75,7 @@
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#include <drm/i915_drm.h>
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#include <asm/msr.h>
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#include <asm/processor.h>
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#include "intel_ips.h"
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#define PCI_DEVICE_ID_INTEL_THERMAL_SENSOR 0x3b32
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@ -245,6 +246,7 @@
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#define thm_writel(off, val) writel((val), ips->regmap + (off))
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static const int IPS_ADJUST_PERIOD = 5000; /* ms */
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static bool late_i915_load = false;
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/* For initial average collection */
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static const int IPS_SAMPLE_PERIOD = 200; /* ms */
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@ -339,6 +341,9 @@ struct ips_driver {
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u64 orig_turbo_ratios;
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};
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static bool
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ips_gpu_turbo_enabled(struct ips_driver *ips);
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/**
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* ips_cpu_busy - is CPU busy?
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* @ips: IPS driver struct
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@ -517,7 +522,7 @@ static void ips_disable_cpu_turbo(struct ips_driver *ips)
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*/
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static bool ips_gpu_busy(struct ips_driver *ips)
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{
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if (!ips->gpu_turbo_enabled)
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if (!ips_gpu_turbo_enabled(ips))
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return false;
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return ips->gpu_busy();
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@ -532,7 +537,7 @@ static bool ips_gpu_busy(struct ips_driver *ips)
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*/
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static void ips_gpu_raise(struct ips_driver *ips)
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{
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if (!ips->gpu_turbo_enabled)
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if (!ips_gpu_turbo_enabled(ips))
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return;
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if (!ips->gpu_raise())
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@ -549,7 +554,7 @@ static void ips_gpu_raise(struct ips_driver *ips)
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*/
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static void ips_gpu_lower(struct ips_driver *ips)
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{
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if (!ips->gpu_turbo_enabled)
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if (!ips_gpu_turbo_enabled(ips))
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return;
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if (!ips->gpu_lower())
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@ -1454,6 +1459,31 @@ static bool ips_get_i915_syms(struct ips_driver *ips)
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return false;
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}
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static bool
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ips_gpu_turbo_enabled(struct ips_driver *ips)
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{
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if (!ips->gpu_busy && late_i915_load) {
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if (ips_get_i915_syms(ips)) {
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dev_info(&ips->dev->dev,
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"i915 driver attached, reenabling gpu turbo\n");
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ips->gpu_turbo_enabled = !(thm_readl(THM_HTS) & HTS_GTD_DIS);
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}
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}
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return ips->gpu_turbo_enabled;
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}
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void
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ips_link_to_i915_driver()
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{
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/* We can't cleanly get at the various ips_driver structs from
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* this caller (the i915 driver), so just set a flag saying
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* that it's time to try getting the symbols again.
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*/
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late_i915_load = true;
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}
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EXPORT_SYMBOL_GPL(ips_link_to_i915_driver);
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static DEFINE_PCI_DEVICE_TABLE(ips_id_table) = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_THERMAL_SENSOR), },
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21
drivers/platform/x86/intel_ips.h
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21
drivers/platform/x86/intel_ips.h
Normal file
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@ -0,0 +1,21 @@
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/*
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* Copyright (c) 2010 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*/
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void ips_link_to_i915_driver(void);
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