forked from luck/tmp_suning_uos_patched
ide: keep pointer to struct device instead of struct pci_dev in ide_hwif_t
Keep pointer to struct device instead of struct pci_dev in ide_hwif_t. While on it: * Use *dev->dma_mask instead of pci_dev->dma_mask in ide_toggle_bounce(). There should be no functionality changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
parent
f6fb786d6d
commit
36501650ec
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@ -184,6 +184,7 @@ static int ide_dma_good_drive(ide_drive_t *drive)
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int ide_build_sglist(ide_drive_t *drive, struct request *rq)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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struct scatterlist *sg = hwif->sg_table;
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ide_map_sg(drive, rq);
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@ -193,7 +194,7 @@ int ide_build_sglist(ide_drive_t *drive, struct request *rq)
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else
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hwif->sg_dma_direction = PCI_DMA_TODEVICE;
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return pci_map_sg(hwif->pci_dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
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return pci_map_sg(pdev, sg, hwif->sg_nents, hwif->sg_dma_direction);
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}
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EXPORT_SYMBOL_GPL(ide_build_sglist);
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@ -306,11 +307,11 @@ EXPORT_SYMBOL_GPL(ide_build_dmatable);
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void ide_destroy_dmatable (ide_drive_t *drive)
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{
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struct pci_dev *dev = HWIF(drive)->pci_dev;
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struct scatterlist *sg = HWIF(drive)->sg_table;
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int nents = HWIF(drive)->sg_nents;
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ide_hwif_t *hwif = drive->hwif;
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
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pci_unmap_sg(pdev, hwif->sg_table, hwif->sg_nents,
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hwif->sg_dma_direction);
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}
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EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
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@ -843,10 +844,10 @@ EXPORT_SYMBOL(ide_dma_timeout);
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static void ide_release_dma_engine(ide_hwif_t *hwif)
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{
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if (hwif->dmatable_cpu) {
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pci_free_consistent(hwif->pci_dev,
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PRD_ENTRIES * PRD_BYTES,
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hwif->dmatable_cpu,
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hwif->dmatable_dma);
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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pci_free_consistent(pdev, PRD_ENTRIES * PRD_BYTES,
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hwif->dmatable_cpu, hwif->dmatable_dma);
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hwif->dmatable_cpu = NULL;
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}
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}
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@ -874,7 +875,9 @@ int ide_release_dma(ide_hwif_t *hwif)
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static int ide_allocate_dma_engine(ide_hwif_t *hwif)
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{
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hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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hwif->dmatable_cpu = pci_alloc_consistent(pdev,
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PRD_ENTRIES * PRD_BYTES,
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&hwif->dmatable_dma);
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@ -358,8 +358,10 @@ void ide_toggle_bounce(ide_drive_t *drive, int on)
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if (!PCI_DMA_BUS_IS_PHYS) {
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addr = BLK_BOUNCE_ANY;
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} else if (on && drive->media == ide_disk) {
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if (HWIF(drive)->pci_dev)
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addr = HWIF(drive)->pci_dev->dma_mask;
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struct device *dev = drive->hwif->dev;
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if (dev && dev->dma_mask)
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addr = *dev->dma_mask;
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}
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if (drive->queue)
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@ -622,8 +622,8 @@ static void hwif_register (ide_hwif_t *hwif)
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strlcpy(hwif->gendev.bus_id,hwif->name,BUS_ID_SIZE);
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hwif->gendev.driver_data = hwif;
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if (hwif->gendev.parent == NULL) {
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if (hwif->pci_dev)
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hwif->gendev.parent = &hwif->pci_dev->dev;
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if (hwif->dev)
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hwif->gendev.parent = hwif->dev;
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else
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/* Would like to do = &device_legacy */
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hwif->gendev.parent = NULL;
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@ -405,8 +405,9 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
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hwif->chipset = tmp_hwif->chipset;
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hwif->hold = tmp_hwif->hold;
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hwif->dev = tmp_hwif->dev;
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#ifdef CONFIG_BLK_DEV_IDEPCI
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hwif->pci_dev = tmp_hwif->pci_dev;
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hwif->cds = tmp_hwif->cds;
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#endif
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@ -90,7 +90,7 @@ static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entr
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static void aec6210_set_mode(ide_drive_t *drive, const u8 speed)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u16 d_conf = 0;
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u8 ultra = 0, ultra_conf = 0;
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u8 tmp0 = 0, tmp1 = 0, tmp2 = 0;
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@ -116,7 +116,7 @@ static void aec6210_set_mode(ide_drive_t *drive, const u8 speed)
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static void aec6260_set_mode(ide_drive_t *drive, const u8 speed)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u8 unit = (drive->select.b.unit & 0x01);
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u8 tmp1 = 0, tmp2 = 0;
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u8 ultra = 0, drive_conf = 0, ultra_conf = 0;
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@ -170,7 +170,7 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch
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static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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hwif->set_pio_mode = &aec_set_pio_mode;
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@ -188,7 +188,7 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
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if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
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u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01;
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pci_read_config_byte(hwif->pci_dev, 0x49, &ata66);
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pci_read_config_byte(dev, 0x49, &ata66);
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hwif->cbl = (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
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}
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@ -293,7 +293,7 @@ static int ali_get_info (char *buffer, char **addr, off_t offset, int count)
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static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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int s_time, a_time, c_time;
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u8 s_clc, a_clc, r_clc;
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unsigned long flags;
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@ -396,7 +396,7 @@ static u8 ali_udma_filter(ide_drive_t *drive)
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static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u8 speed1 = speed;
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u8 unit = (drive->select.b.unit & 0x01);
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u8 tmpbyte = 0x00;
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@ -625,7 +625,7 @@ static int ali_cable_override(struct pci_dev *pdev)
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static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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unsigned long flags;
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u8 cbl = ATA_CBL_PATA40, tmpbyte;
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@ -688,12 +688,13 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
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static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u8 ideic, inmir;
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s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
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1, 11, 0, 12, 0, 14, 0, 15 };
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int irq = -1;
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if (hwif->pci_dev->device == PCI_DEVICE_ID_AL_M5229)
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if (dev->device == PCI_DEVICE_ID_AL_M5229)
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hwif->irq = hwif->channel ? 15 : 14;
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if (isa_dev) {
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@ -86,6 +86,7 @@ static void amd_set_speed(struct pci_dev *dev, u8 dn, u8 udma_mask,
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static void amd_set_drive(ide_drive_t *drive, const u8 speed)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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ide_drive_t *peer = hwif->drives + (~drive->dn & 1);
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struct ide_timing t, p;
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int T, UT;
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@ -104,7 +105,7 @@ static void amd_set_drive(ide_drive_t *drive, const u8 speed)
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if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1;
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if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15;
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amd_set_speed(hwif->pci_dev, drive->dn, udma_mask, &t);
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amd_set_speed(dev, drive->dn, udma_mask, &t);
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}
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/*
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@ -202,8 +203,10 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev,
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static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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if (hwif->irq == 0) /* 0 is bogus but will do for now */
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hwif->irq = pci_get_legacy_ide_irq(hwif->pci_dev, hwif->channel);
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hwif->irq = pci_get_legacy_ide_irq(dev, hwif->channel);
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hwif->set_pio_mode = &amd_set_pio_mode;
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hwif->set_dma_mode = &amd_set_drive;
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@ -55,7 +55,7 @@ static DEFINE_SPINLOCK(atiixp_lock);
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static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
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{
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struct pci_dev *dev = drive->hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
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unsigned long flags;
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int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
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u32 pio_timing_data;
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@ -88,7 +88,7 @@ static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
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static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed)
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{
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struct pci_dev *dev = drive->hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
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unsigned long flags;
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int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
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u32 tmp32;
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@ -133,9 +133,8 @@ static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed)
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static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
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{
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u8 udma_mode = 0;
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u8 ch = hwif->channel;
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struct pci_dev *pdev = hwif->pci_dev;
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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u8 udma_mode = 0, ch = hwif->channel;
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hwif->set_pio_mode = &atiixp_set_pio_mode;
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hwif->set_dma_mode = &atiixp_set_dma_mode;
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@ -71,7 +71,7 @@ static u8 quantize_timing(int timing, int quant)
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*/
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static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_time)
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{
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struct pci_dev *dev = HWIF(drive)->pci_dev;
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struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
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int clock_time = 1000 / system_bus_clock();
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u8 cycle_count, active_count, recovery_count, drwtim;
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static const u8 recovery_values[] =
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@ -118,7 +118,7 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_
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static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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unsigned int cycle_time;
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u8 setup_count, arttim = 0;
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@ -183,7 +183,7 @@ static void cmd64x_set_pio_mode(ide_drive_t *drive, const u8 pio)
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static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u8 unit = drive->dn & 0x01;
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u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0;
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@ -245,7 +245,7 @@ static int cmd648_ide_dma_end (ide_drive_t *drive)
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static int cmd64x_ide_dma_end (ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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int irq_reg = hwif->channel ? ARTTIM23 : CFR;
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u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
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CFR_INTR_CH0;
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@ -285,7 +285,7 @@ static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
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static int cmd64x_ide_dma_test_irq (ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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int irq_reg = hwif->channel ? ARTTIM23 : CFR;
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u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
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CFR_INTR_CH0;
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@ -375,7 +375,7 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
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static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01;
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switch (dev->device) {
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@ -390,7 +390,7 @@ static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif)
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static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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hwif->set_pio_mode = &cmd64x_set_pio_mode;
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hwif->set_dma_mode = &cmd64x_set_dma_mode;
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@ -69,7 +69,7 @@ static struct pio_clocks cs5520_pio_clocks[]={
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static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *pdev = hwif->pci_dev;
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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int controller = drive->dn > 1 ? 1 : 0;
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/* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
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@ -177,13 +177,15 @@ static u8 __devinit cs5535_cable_detect(struct pci_dev *dev)
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*/
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static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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hwif->set_pio_mode = &cs5535_set_pio_mode;
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hwif->set_dma_mode = &cs5535_set_dma_mode;
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if (hwif->dma_base == 0)
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return;
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hwif->cbl = cs5535_cable_detect(hwif->pci_dev);
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hwif->cbl = cs5535_cable_detect(dev);
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}
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static const struct ide_port_info cs5535_chipset __devinitdata = {
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@ -228,7 +228,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
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static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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pio_clocks_t pclk;
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unsigned int addrCtrl;
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@ -397,8 +397,9 @@ static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif)
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static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
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{
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static ide_hwif_t *primary;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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if (PCI_FUNC(hwif->pci_dev->devfn) == 1)
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if (PCI_FUNC(dev->devfn) == 1)
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primary = hwif;
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else {
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hwif->mate = primary;
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@ -87,7 +87,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
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return -ENODEV;
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}
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pci_set_drvdata(dev, hwif);
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hwif->pci_dev = dev;
|
||||
hwif->dev = &dev->dev;
|
||||
drive = &hwif->drives[0];
|
||||
if (drive->present) {
|
||||
drive->io_32bit = 1;
|
||||
|
|
|
@ -45,7 +45,7 @@
|
|||
|
||||
static void hpt34x_set_mode(ide_drive_t *drive, const u8 speed)
|
||||
{
|
||||
struct pci_dev *dev = HWIF(drive)->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0;
|
||||
u8 hi_speed, lo_speed;
|
||||
|
||||
|
|
|
@ -626,7 +626,8 @@ static int check_in_drive_list(ide_drive_t *drive, const char **list)
|
|||
static u8 hpt3xx_udma_filter(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct hpt_info *info = pci_get_drvdata(hwif->pci_dev);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct hpt_info *info = pci_get_drvdata(dev);
|
||||
u8 mask = hwif->ultra_mask;
|
||||
|
||||
switch (info->chip_type) {
|
||||
|
@ -665,7 +666,8 @@ static u8 hpt3xx_udma_filter(ide_drive_t *drive)
|
|||
static u8 hpt3xx_mdma_filter(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct hpt_info *info = pci_get_drvdata(hwif->pci_dev);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct hpt_info *info = pci_get_drvdata(dev);
|
||||
|
||||
switch (info->chip_type) {
|
||||
case HPT372 :
|
||||
|
@ -699,7 +701,7 @@ static u32 get_speed_setting(u8 speed, struct hpt_info *info)
|
|||
|
||||
static void hpt3xx_set_mode(ide_drive_t *drive, const u8 speed)
|
||||
{
|
||||
struct pci_dev *dev = HWIF(drive)->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
struct hpt_info *info = pci_get_drvdata(dev);
|
||||
struct hpt_timings *t = info->timings;
|
||||
u8 itr_addr = 0x40 + (drive->dn * 4);
|
||||
|
@ -742,7 +744,7 @@ static void hpt3xx_quirkproc(ide_drive_t *drive)
|
|||
static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct hpt_info *info = pci_get_drvdata(dev);
|
||||
|
||||
if (drive->quirk_list) {
|
||||
|
@ -774,7 +776,7 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
|
|||
*/
|
||||
static void hpt366_dma_lost_irq(ide_drive_t *drive)
|
||||
{
|
||||
struct pci_dev *dev = HWIF(drive)->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u8 mcr1 = 0, mcr3 = 0, scr1 = 0;
|
||||
|
||||
pci_read_config_byte(dev, 0x50, &mcr1);
|
||||
|
@ -790,18 +792,20 @@ static void hpt366_dma_lost_irq(ide_drive_t *drive)
|
|||
static void hpt370_clear_engine(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
pci_write_config_byte(hwif->pci_dev, hwif->select_data, 0x37);
|
||||
pci_write_config_byte(dev, hwif->select_data, 0x37);
|
||||
udelay(10);
|
||||
}
|
||||
|
||||
static void hpt370_irq_timeout(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u16 bfifo = 0;
|
||||
u8 dma_cmd;
|
||||
|
||||
pci_read_config_word(hwif->pci_dev, hwif->select_data + 2, &bfifo);
|
||||
pci_read_config_word(dev, hwif->select_data + 2, &bfifo);
|
||||
printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff);
|
||||
|
||||
/* get DMA command mode */
|
||||
|
@ -844,10 +848,11 @@ static void hpt370_dma_timeout(ide_drive_t *drive)
|
|||
static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u16 bfifo = 0;
|
||||
u8 dma_stat;
|
||||
|
||||
pci_read_config_word(hwif->pci_dev, hwif->select_data + 2, &bfifo);
|
||||
pci_read_config_word(dev, hwif->select_data + 2, &bfifo);
|
||||
if (bfifo & 0x1FF) {
|
||||
// printk("%s: %d bytes in FIFO\n", drive->name, bfifo);
|
||||
return 0;
|
||||
|
@ -867,7 +872,7 @@ static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
|
|||
static int hpt374_ide_dma_end(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 mcr = 0, mcr_addr = hwif->select_data;
|
||||
u8 bwsr = 0, mask = hwif->channel ? 0x02 : 0x01;
|
||||
|
||||
|
@ -942,7 +947,7 @@ static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq)
|
|||
static int hpt3xx_busproc(ide_drive_t *drive, int state)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 mcr_addr = hwif->select_data + 2;
|
||||
u8 resetmask = hwif->channel ? 0x80 : 0x40;
|
||||
u8 bsr2 = 0;
|
||||
|
@ -1278,7 +1283,7 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha
|
|||
|
||||
static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct hpt_info *info = pci_get_drvdata(dev);
|
||||
int serialize = HPT_SERIALIZE_IO;
|
||||
u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02;
|
||||
|
@ -1393,7 +1398,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
|
|||
|
||||
static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 masterdma = 0, slavedma = 0;
|
||||
u8 dma_new = 0, dma_old = 0;
|
||||
unsigned long flags;
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
int is_slave = drive->dn & 1;
|
||||
int master_port = 0x40;
|
||||
int slave_port = 0x44;
|
||||
|
@ -85,7 +85,7 @@ static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
|||
static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 maslave = 0x40;
|
||||
int a_speed = 3 << (drive->dn * 4);
|
||||
int u_flag = 1 << drive->dn;
|
||||
|
@ -152,6 +152,7 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
|
||||
static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 reg42h = 0;
|
||||
|
||||
hwif->set_dma_mode = &it8213_set_dma_mode;
|
||||
|
@ -160,7 +161,7 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
|
|||
if (!hwif->dma_base)
|
||||
return;
|
||||
|
||||
pci_read_config_byte(hwif->pci_dev, 0x42, ®42h);
|
||||
pci_read_config_byte(dev, 0x42, ®42h);
|
||||
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
|
||||
|
|
|
@ -113,7 +113,8 @@ static int it8212_noraid;
|
|||
|
||||
static void it821x_program(ide_drive_t *drive, u16 timing)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct it821x_dev *itdev = ide_get_hwifdata(hwif);
|
||||
int channel = hwif->channel;
|
||||
u8 conf;
|
||||
|
@ -123,7 +124,8 @@ static void it821x_program(ide_drive_t *drive, u16 timing)
|
|||
conf = timing >> 8;
|
||||
else
|
||||
conf = timing & 0xFF;
|
||||
pci_write_config_byte(hwif->pci_dev, 0x54 + 4 * channel, conf);
|
||||
|
||||
pci_write_config_byte(dev, 0x54 + 4 * channel, conf);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -137,7 +139,8 @@ static void it821x_program(ide_drive_t *drive, u16 timing)
|
|||
|
||||
static void it821x_program_udma(ide_drive_t *drive, u16 timing)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct it821x_dev *itdev = ide_get_hwifdata(hwif);
|
||||
int channel = hwif->channel;
|
||||
int unit = drive->select.b.unit;
|
||||
|
@ -148,11 +151,12 @@ static void it821x_program_udma(ide_drive_t *drive, u16 timing)
|
|||
conf = timing >> 8;
|
||||
else
|
||||
conf = timing & 0xFF;
|
||||
if(itdev->timing10 == 0)
|
||||
pci_write_config_byte(hwif->pci_dev, 0x56 + 4 * channel + unit, conf);
|
||||
|
||||
if (itdev->timing10 == 0)
|
||||
pci_write_config_byte(dev, 0x56 + 4 * channel + unit, conf);
|
||||
else {
|
||||
pci_write_config_byte(hwif->pci_dev, 0x56 + 4 * channel, conf);
|
||||
pci_write_config_byte(hwif->pci_dev, 0x56 + 4 * channel + 1, conf);
|
||||
pci_write_config_byte(dev, 0x56 + 4 * channel, conf);
|
||||
pci_write_config_byte(dev, 0x56 + 4 * channel + 1, conf);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -167,6 +171,7 @@ static void it821x_program_udma(ide_drive_t *drive, u16 timing)
|
|||
static void it821x_clock_strategy(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct it821x_dev *itdev = ide_get_hwifdata(hwif);
|
||||
|
||||
u8 unit = drive->select.b.unit;
|
||||
|
@ -205,10 +210,11 @@ static void it821x_clock_strategy(ide_drive_t *drive)
|
|||
itdev->clock_mode = ATA_50;
|
||||
sel = 1;
|
||||
}
|
||||
pci_read_config_byte(hwif->pci_dev, 0x50, &v);
|
||||
|
||||
pci_read_config_byte(dev, 0x50, &v);
|
||||
v &= ~(1 << (1 + hwif->channel));
|
||||
v |= sel << (1 + hwif->channel);
|
||||
pci_write_config_byte(hwif->pci_dev, 0x50, v);
|
||||
pci_write_config_byte(dev, 0x50, v);
|
||||
|
||||
/*
|
||||
* Reprogram the UDMA/PIO of the pair drive for the switch
|
||||
|
@ -282,7 +288,8 @@ static void it821x_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
|||
|
||||
static void it821x_tune_mwdma (ide_drive_t *drive, byte mode_wanted)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct it821x_dev *itdev = (void *)ide_get_hwifdata(hwif);
|
||||
int unit = drive->select.b.unit;
|
||||
int channel = hwif->channel;
|
||||
|
@ -297,12 +304,12 @@ static void it821x_tune_mwdma (ide_drive_t *drive, byte mode_wanted)
|
|||
itdev->udma[unit] = UDMA_OFF;
|
||||
|
||||
/* UDMA bits off - Revision 0x10 do them in pairs */
|
||||
pci_read_config_byte(hwif->pci_dev, 0x50, &conf);
|
||||
if(itdev->timing10)
|
||||
pci_read_config_byte(dev, 0x50, &conf);
|
||||
if (itdev->timing10)
|
||||
conf |= channel ? 0x60: 0x18;
|
||||
else
|
||||
conf |= 1 << (3 + 2 * channel + unit);
|
||||
pci_write_config_byte(hwif->pci_dev, 0x50, conf);
|
||||
pci_write_config_byte(dev, 0x50, conf);
|
||||
|
||||
it821x_clock_strategy(drive);
|
||||
/* FIXME: do we need to program this ? */
|
||||
|
@ -320,7 +327,8 @@ static void it821x_tune_mwdma (ide_drive_t *drive, byte mode_wanted)
|
|||
|
||||
static void it821x_tune_udma (ide_drive_t *drive, byte mode_wanted)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct it821x_dev *itdev = ide_get_hwifdata(hwif);
|
||||
int unit = drive->select.b.unit;
|
||||
int channel = hwif->channel;
|
||||
|
@ -337,12 +345,12 @@ static void it821x_tune_udma (ide_drive_t *drive, byte mode_wanted)
|
|||
itdev->udma[unit] |= 0x8080; /* UDMA 5/6 select on */
|
||||
|
||||
/* UDMA on. Again revision 0x10 must do the pair */
|
||||
pci_read_config_byte(hwif->pci_dev, 0x50, &conf);
|
||||
if(itdev->timing10)
|
||||
pci_read_config_byte(dev, 0x50, &conf);
|
||||
if (itdev->timing10)
|
||||
conf &= channel ? 0x9F: 0xE7;
|
||||
else
|
||||
conf &= ~ (1 << (3 + 2 * channel + unit));
|
||||
pci_write_config_byte(hwif->pci_dev, 0x50, conf);
|
||||
pci_write_config_byte(dev, 0x50, conf);
|
||||
|
||||
it821x_clock_strategy(drive);
|
||||
it821x_program_udma(drive, itdev->udma[unit]);
|
||||
|
@ -520,6 +528,7 @@ static void __devinit it821x_quirkproc(ide_drive_t *drive)
|
|||
|
||||
static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct it821x_dev *idev = kzalloc(sizeof(struct it821x_dev), GFP_KERNEL);
|
||||
u8 conf;
|
||||
|
||||
|
@ -532,7 +541,7 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
|
|||
|
||||
ide_set_hwifdata(hwif, idev);
|
||||
|
||||
pci_read_config_byte(hwif->pci_dev, 0x50, &conf);
|
||||
pci_read_config_byte(dev, 0x50, &conf);
|
||||
if (conf & 1) {
|
||||
idev->smart = 1;
|
||||
hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
|
||||
|
@ -555,7 +564,7 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
|
|||
* this is necessary.
|
||||
*/
|
||||
|
||||
pci_read_config_byte(hwif->pci_dev, 0x08, &conf);
|
||||
pci_read_config_byte(dev, 0x08, &conf);
|
||||
if (conf == 0x10) {
|
||||
idev->timing10 = 1;
|
||||
hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
|
||||
|
|
|
@ -30,7 +30,7 @@ typedef enum {
|
|||
|
||||
static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *pdev = hwif->pci_dev;
|
||||
struct pci_dev *pdev = to_pci_dev(hwif->dev);
|
||||
|
||||
u32 control;
|
||||
u32 control5;
|
||||
|
|
|
@ -71,10 +71,9 @@ static u8 superio_ide_inb (unsigned long port)
|
|||
|
||||
static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
|
||||
{
|
||||
struct pci_dev *pdev = to_pci_dev(hwif->dev);
|
||||
u32 base, dmabase;
|
||||
u8 tmp;
|
||||
struct pci_dev *pdev = hwif->pci_dev;
|
||||
u8 port = hwif->channel;
|
||||
u8 port = hwif->channel, tmp;
|
||||
|
||||
base = pci_resource_start(pdev, port * 2) & ~3;
|
||||
dmabase = pci_resource_start(pdev, 4) & ~3;
|
||||
|
@ -93,10 +92,11 @@ static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
|
|||
|
||||
static void __devinit init_iops_ns87415(ide_hwif_t *hwif)
|
||||
{
|
||||
if (PCI_SLOT(hwif->pci_dev->devfn) == 0xE) {
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
if (PCI_SLOT(dev->devfn) == 0xE)
|
||||
/* Built-in - assume it's under superio. */
|
||||
superio_ide_init_iops(hwif);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -110,8 +110,8 @@ static unsigned int ns87415_count = 0, ns87415_control[MAX_HWIFS] = { 0 };
|
|||
static void ns87415_prepare_drive (ide_drive_t *drive, unsigned int use_dma)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
unsigned int bit, other, new, *old = (unsigned int *) hwif->select_data;
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
@ -189,7 +189,7 @@ static int ns87415_ide_dma_setup(ide_drive_t *drive)
|
|||
|
||||
static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
unsigned int ctrl, using_inta;
|
||||
u8 progif;
|
||||
#ifdef __sparc_v9__
|
||||
|
|
|
@ -149,6 +149,7 @@ static struct udma_timing {
|
|||
static void pdcnew_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 adj = (drive->dn & 1) ? 0x08 : 0x00;
|
||||
|
||||
/*
|
||||
|
@ -159,7 +160,7 @@ static void pdcnew_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
* As we set up the PLL to output 133 MHz for UltraDMA/133 capable
|
||||
* chips, we must override the default register settings...
|
||||
*/
|
||||
if (max_dma_rate(hwif->pci_dev) == 4) {
|
||||
if (max_dma_rate(dev) == 4) {
|
||||
u8 mode = speed & 0x07;
|
||||
|
||||
if (speed >= XFER_UDMA_0) {
|
||||
|
@ -186,9 +187,10 @@ static void pdcnew_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
static void pdcnew_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 adj = (drive->dn & 1) ? 0x08 : 0x00;
|
||||
|
||||
if (max_dma_rate(hwif->pci_dev) == 4) {
|
||||
if (max_dma_rate(dev) == 4) {
|
||||
set_indexed_reg(hwif, 0x0c + adj, pio_timings[pio].reg0c);
|
||||
set_indexed_reg(hwif, 0x0d + adj, pio_timings[pio].reg0d);
|
||||
set_indexed_reg(hwif, 0x13 + adj, pio_timings[pio].reg13);
|
||||
|
|
|
@ -66,7 +66,7 @@ static void pdc_old_disable_66MHz_clock(ide_hwif_t *);
|
|||
static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 drive_pci = 0x60 + (drive->dn << 2);
|
||||
|
||||
u8 AP = 0, BP = 0, CP = 0;
|
||||
|
@ -144,9 +144,10 @@ static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
|||
|
||||
static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u16 CIS = 0, mask = (hwif->channel) ? (1<<11) : (1<<10);
|
||||
|
||||
pci_read_config_word(hwif->pci_dev, 0x50, &CIS);
|
||||
pci_read_config_word(dev, 0x50, &CIS);
|
||||
|
||||
return (CIS & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
|
||||
}
|
||||
|
@ -305,12 +306,14 @@ static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
|
|||
|
||||
static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
hwif->set_pio_mode = &pdc202xx_set_pio_mode;
|
||||
hwif->set_dma_mode = &pdc202xx_set_mode;
|
||||
|
||||
hwif->quirkproc = &pdc202xx_quirkproc;
|
||||
|
||||
if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246)
|
||||
if (dev->device != PCI_DEVICE_ID_PROMISE_20246)
|
||||
hwif->resetproc = &pdc202xx_reset;
|
||||
|
||||
if (hwif->dma_base == 0)
|
||||
|
@ -319,7 +322,7 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
|
|||
hwif->dma_lost_irq = &pdc202xx_dma_lost_irq;
|
||||
hwif->dma_timeout = &pdc202xx_dma_timeout;
|
||||
|
||||
if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) {
|
||||
if (dev->device != PCI_DEVICE_ID_PROMISE_20246) {
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
hwif->cbl = pdc202xx_old_cable_detect(hwif);
|
||||
|
||||
|
|
|
@ -71,7 +71,7 @@ static int no_piix_dma;
|
|||
static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
int is_slave = drive->dn & 1;
|
||||
int master_port = hwif->channel ? 0x42 : 0x40;
|
||||
int slave_port = 0x44;
|
||||
|
@ -140,7 +140,7 @@ static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
|||
static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 maslave = hwif->channel ? 0x42 : 0x40;
|
||||
int a_speed = 3 << (drive->dn * 4);
|
||||
int u_flag = 1 << drive->dn;
|
||||
|
@ -260,7 +260,7 @@ static const struct ich_laptop ich_laptop[] = {
|
|||
|
||||
static u8 __devinit piix_cable_detect(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *pdev = hwif->pci_dev;
|
||||
struct pci_dev *pdev = to_pci_dev(hwif->dev);
|
||||
const struct ich_laptop *lap = &ich_laptop[0];
|
||||
u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30;
|
||||
|
||||
|
|
|
@ -32,8 +32,8 @@
|
|||
|
||||
static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u16 reg;
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
|
||||
if (!pci_read_config_word (dev, 0x40, ®) &&
|
||||
!pci_write_config_word(dev, 0x40, reg & 0xdfff)) {
|
||||
|
|
|
@ -87,7 +87,7 @@ static const unsigned int sc1200_pio_timings[4][5] =
|
|||
static void sc1200_tunepio(ide_drive_t *drive, u8 pio)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct pci_dev *pdev = hwif->pci_dev;
|
||||
struct pci_dev *pdev = to_pci_dev(hwif->dev);
|
||||
unsigned int basereg = hwif->channel ? 0x50 : 0x40, format = 0;
|
||||
|
||||
pci_read_config_dword(pdev, basereg + 4, &format);
|
||||
|
@ -130,6 +130,7 @@ static u8 sc1200_udma_filter(ide_drive_t *drive)
|
|||
static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
int unit = drive->select.b.unit;
|
||||
unsigned int reg, timings;
|
||||
unsigned short pci_clock;
|
||||
|
@ -160,12 +161,11 @@ static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode)
|
|||
timings = mwdma_timing[pci_clock][mode - XFER_MW_DMA_0];
|
||||
|
||||
if (unit == 0) { /* are we configuring drive0? */
|
||||
pci_read_config_dword(hwif->pci_dev, basereg+4, ®);
|
||||
pci_read_config_dword(dev, basereg + 4, ®);
|
||||
timings |= reg & 0x80000000; /* preserve PIO format bit */
|
||||
pci_write_config_dword(hwif->pci_dev, basereg+4, timings);
|
||||
} else {
|
||||
pci_write_config_dword(hwif->pci_dev, basereg+12, timings);
|
||||
}
|
||||
pci_write_config_dword(dev, basereg + 4, timings);
|
||||
} else
|
||||
pci_write_config_dword(dev, basereg + 12, timings);
|
||||
}
|
||||
|
||||
/* Replacement for the standard ide_dma_end action in
|
||||
|
|
|
@ -594,7 +594,7 @@ static int __devinit init_setup_scc(struct pci_dev *dev,
|
|||
|
||||
static void __devinit init_mmio_iops_scc(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct scc_ports *ports = pci_get_drvdata(dev);
|
||||
unsigned long dma_base = ports->dma;
|
||||
|
||||
|
@ -620,7 +620,7 @@ static void __devinit init_mmio_iops_scc(ide_hwif_t *hwif)
|
|||
hwif->io_ports[IDE_STATUS_OFFSET] = dma_base + 0x3c;
|
||||
hwif->io_ports[IDE_CONTROL_OFFSET] = dma_base + 0x40;
|
||||
|
||||
hwif->irq = hwif->pci_dev->irq;
|
||||
hwif->irq = dev->irq;
|
||||
hwif->dma_base = dma_base;
|
||||
hwif->config_data = ports->ctl;
|
||||
hwif->mmio = 1;
|
||||
|
@ -636,7 +636,8 @@ static void __devinit init_mmio_iops_scc(ide_hwif_t *hwif)
|
|||
|
||||
static void __devinit init_iops_scc(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
hwif->hwif_data = NULL;
|
||||
if (pci_get_drvdata(dev) == NULL)
|
||||
return;
|
||||
|
@ -726,10 +727,8 @@ static void __devexit scc_remove(struct pci_dev *dev)
|
|||
unsigned long dma_size = pci_resource_len(dev, 1);
|
||||
|
||||
if (hwif->dmatable_cpu) {
|
||||
pci_free_consistent(hwif->pci_dev,
|
||||
PRD_ENTRIES * PRD_BYTES,
|
||||
hwif->dmatable_cpu,
|
||||
hwif->dmatable_dma);
|
||||
pci_free_consistent(dev, PRD_ENTRIES * PRD_BYTES,
|
||||
hwif->dmatable_cpu, hwif->dmatable_dma);
|
||||
hwif->dmatable_cpu = NULL;
|
||||
}
|
||||
|
||||
|
|
|
@ -67,7 +67,7 @@ static int check_in_drive_lists (ide_drive_t *drive, const char **list)
|
|||
|
||||
static u8 svwks_udma_filter(ide_drive_t *drive)
|
||||
{
|
||||
struct pci_dev *dev = HWIF(drive)->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u8 mask = 0;
|
||||
|
||||
if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
|
||||
|
@ -130,7 +130,7 @@ static void svwks_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
|||
static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
|
||||
static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 };
|
||||
|
||||
struct pci_dev *dev = drive->hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
|
||||
pci_write_config_byte(dev, drive_pci[drive->dn], pio_modes[pio]);
|
||||
|
||||
|
@ -153,7 +153,7 @@ static void svwks_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
static const u8 drive_pci2[] = { 0x45, 0x44, 0x47, 0x46 };
|
||||
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 unit = (drive->select.b.unit & 0x01);
|
||||
|
||||
u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
|
||||
|
@ -287,7 +287,8 @@ static u8 __devinit ata66_svwks_svwks(ide_hwif_t *hwif)
|
|||
*/
|
||||
static u8 __devinit ata66_svwks_dell(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
|
||||
dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
|
||||
(dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE ||
|
||||
|
@ -305,7 +306,8 @@ static u8 __devinit ata66_svwks_dell(ide_hwif_t *hwif)
|
|||
*/
|
||||
static u8 __devinit ata66_svwks_cobalt(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN &&
|
||||
dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
|
||||
dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
|
||||
|
@ -316,7 +318,7 @@ static u8 __devinit ata66_svwks_cobalt(ide_hwif_t *hwif)
|
|||
|
||||
static u8 __devinit ata66_svwks(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
/* Server Works */
|
||||
if (dev->subsystem_vendor == PCI_VENDOR_ID_SERVERWORKS)
|
||||
|
@ -340,6 +342,8 @@ static u8 __devinit ata66_svwks(ide_hwif_t *hwif)
|
|||
|
||||
static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
hwif->set_pio_mode = &svwks_set_pio_mode;
|
||||
hwif->set_dma_mode = &svwks_set_dma_mode;
|
||||
hwif->udma_filter = &svwks_udma_filter;
|
||||
|
@ -347,7 +351,7 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
|
|||
if (!hwif->dma_base)
|
||||
return;
|
||||
|
||||
if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
|
||||
if (dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
hwif->cbl = ata66_svwks(hwif);
|
||||
}
|
||||
|
|
|
@ -159,6 +159,7 @@ sgiioc4_clearirq(ide_drive_t * drive)
|
|||
}
|
||||
|
||||
if (intr_reg & 0x02) {
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
/* Error when transferring DMA data on PCI bus */
|
||||
u32 pci_err_addr_low, pci_err_addr_high,
|
||||
pci_stat_cmd_reg;
|
||||
|
@ -167,7 +168,7 @@ sgiioc4_clearirq(ide_drive_t * drive)
|
|||
readl((void __iomem *)hwif->io_ports[IDE_IRQ_OFFSET]);
|
||||
pci_err_addr_high =
|
||||
readl((void __iomem *)(hwif->io_ports[IDE_IRQ_OFFSET] + 4));
|
||||
pci_read_config_dword(hwif->pci_dev, PCI_COMMAND,
|
||||
pci_read_config_dword(dev, PCI_COMMAND,
|
||||
&pci_stat_cmd_reg);
|
||||
printk(KERN_ERR
|
||||
"%s(%s) : PCI Bus Error when doing DMA:"
|
||||
|
@ -178,8 +179,7 @@ sgiioc4_clearirq(ide_drive_t * drive)
|
|||
__FUNCTION__, drive->name,
|
||||
pci_err_addr_high, pci_err_addr_low);
|
||||
/* Clear the PCI Error indicator */
|
||||
pci_write_config_dword(hwif->pci_dev, PCI_COMMAND,
|
||||
0x00000146);
|
||||
pci_write_config_dword(dev, PCI_COMMAND, 0x00000146);
|
||||
}
|
||||
|
||||
/* Clear the Interrupt, Error bits on the IOC4 */
|
||||
|
@ -334,6 +334,7 @@ sgiioc4_INB(unsigned long port)
|
|||
static int __devinit
|
||||
ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
void __iomem *virt_dma_base;
|
||||
int num_ports = sizeof (ioc4_dma_regs_t);
|
||||
void *pad;
|
||||
|
@ -359,7 +360,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
|
|||
}
|
||||
hwif->dma_base = (unsigned long) virt_dma_base;
|
||||
|
||||
hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
|
||||
hwif->dmatable_cpu = pci_alloc_consistent(dev,
|
||||
IOC4_PRD_ENTRIES * IOC4_PRD_BYTES,
|
||||
&hwif->dmatable_dma);
|
||||
|
||||
|
@ -368,7 +369,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
|
|||
|
||||
hwif->sg_max_nents = IOC4_PRD_ENTRIES;
|
||||
|
||||
pad = pci_alloc_consistent(hwif->pci_dev, IOC4_IDE_CACHELINE_SIZE,
|
||||
pad = pci_alloc_consistent(dev, IOC4_IDE_CACHELINE_SIZE,
|
||||
(dma_addr_t *) &(hwif->dma_status));
|
||||
|
||||
if (pad) {
|
||||
|
@ -376,8 +377,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
|
|||
return 0;
|
||||
}
|
||||
|
||||
pci_free_consistent(hwif->pci_dev,
|
||||
IOC4_PRD_ENTRIES * IOC4_PRD_BYTES,
|
||||
pci_free_consistent(dev, IOC4_PRD_ENTRIES * IOC4_PRD_BYTES,
|
||||
hwif->dmatable_cpu, hwif->dmatable_dma);
|
||||
printk(KERN_INFO
|
||||
"%s() -- Error! Unable to allocate DMA Maps for drive %s\n",
|
||||
|
@ -640,7 +640,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
|
|||
hw.dev = &dev->dev;
|
||||
ide_init_port_hw(hwif, &hw);
|
||||
|
||||
hwif->pci_dev = dev;
|
||||
hwif->dev = &dev->dev;
|
||||
hwif->channel = 0; /* Single Channel chip */
|
||||
|
||||
/* The IOC4 uses MMIO rather than Port IO. */
|
||||
|
|
|
@ -79,7 +79,7 @@ static int pdev_is_sata(struct pci_dev *pdev)
|
|||
|
||||
static inline int is_sata(ide_hwif_t *hwif)
|
||||
{
|
||||
return pdev_is_sata(hwif->pci_dev);
|
||||
return pdev_is_sata(to_pci_dev(hwif->dev));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -140,13 +140,14 @@ static inline unsigned long siimage_seldev(ide_drive_t *drive, int r)
|
|||
static u8 sil_pata_udma_filter(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
unsigned long base = (unsigned long) hwif->hwif_data;
|
||||
u8 mask = 0, scsc = 0;
|
||||
|
||||
if (hwif->mmio)
|
||||
scsc = hwif->INB(base + 0x4A);
|
||||
else
|
||||
pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc);
|
||||
pci_read_config_byte(dev, 0x8A, &scsc);
|
||||
|
||||
if ((scsc & 0x30) == 0x10) /* 133 */
|
||||
mask = ATA_UDMA6;
|
||||
|
@ -219,19 +220,21 @@ static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)
|
|||
mode |= (unit ? 0x10 : 0x01);
|
||||
hwif->OUTB(mode, base + addr_mask);
|
||||
} else {
|
||||
pci_write_config_word(hwif->pci_dev, addr, speedp);
|
||||
pci_write_config_word(hwif->pci_dev, tfaddr, speedt);
|
||||
pci_read_config_word(hwif->pci_dev, tfaddr-2, &speedp);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
pci_write_config_word(dev, addr, speedp);
|
||||
pci_write_config_word(dev, tfaddr, speedt);
|
||||
pci_read_config_word(dev, tfaddr - 2, &speedp);
|
||||
speedp &= ~0x200;
|
||||
/* Set IORDY for mode 3 or 4 */
|
||||
if (pio > 2)
|
||||
speedp |= 0x200;
|
||||
pci_write_config_word(hwif->pci_dev, tfaddr-2, speedp);
|
||||
pci_write_config_word(dev, tfaddr - 2, speedp);
|
||||
|
||||
pci_read_config_byte(hwif->pci_dev, addr_mask, &mode);
|
||||
pci_read_config_byte(dev, addr_mask, &mode);
|
||||
mode &= ~(unit ? 0x30 : 0x03);
|
||||
mode |= (unit ? 0x10 : 0x01);
|
||||
pci_write_config_byte(hwif->pci_dev, addr_mask, mode);
|
||||
pci_write_config_byte(dev, addr_mask, mode);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -250,6 +253,7 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
u16 dma[] = { 0x2208, 0x10C2, 0x10C1 };
|
||||
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u16 ultra = 0, multi = 0;
|
||||
u8 mode = 0, unit = drive->select.b.unit;
|
||||
unsigned long base = (unsigned long)hwif->hwif_data;
|
||||
|
@ -266,10 +270,10 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
multi = hwif->INW(ma);
|
||||
ultra = hwif->INW(ua);
|
||||
} else {
|
||||
pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc);
|
||||
pci_read_config_byte(hwif->pci_dev, addr_mask, &mode);
|
||||
pci_read_config_word(hwif->pci_dev, ma, &multi);
|
||||
pci_read_config_word(hwif->pci_dev, ua, &ultra);
|
||||
pci_read_config_byte(dev, 0x8A, &scsc);
|
||||
pci_read_config_byte(dev, addr_mask, &mode);
|
||||
pci_read_config_word(dev, ma, &multi);
|
||||
pci_read_config_word(dev, ua, &ultra);
|
||||
}
|
||||
|
||||
mode &= ~((unit) ? 0x30 : 0x03);
|
||||
|
@ -293,9 +297,9 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
hwif->OUTW(multi, ma);
|
||||
hwif->OUTW(ultra, ua);
|
||||
} else {
|
||||
pci_write_config_byte(hwif->pci_dev, addr_mask, mode);
|
||||
pci_write_config_word(hwif->pci_dev, ma, multi);
|
||||
pci_write_config_word(hwif->pci_dev, ua, ultra);
|
||||
pci_write_config_byte(dev, addr_mask, mode);
|
||||
pci_write_config_word(dev, ma, multi);
|
||||
pci_write_config_word(dev, ua, ultra);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -303,6 +307,7 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
static int siimage_io_ide_dma_test_irq (ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 dma_altstat = 0;
|
||||
unsigned long addr = siimage_selreg(hwif, 1);
|
||||
|
||||
|
@ -311,7 +316,7 @@ static int siimage_io_ide_dma_test_irq (ide_drive_t *drive)
|
|||
return 1;
|
||||
|
||||
/* return 1 if Device INTR asserted */
|
||||
pci_read_config_byte(hwif->pci_dev, addr, &dma_altstat);
|
||||
pci_read_config_byte(dev, addr, &dma_altstat);
|
||||
if (dma_altstat & 8)
|
||||
return 0; //return 1;
|
||||
return 0;
|
||||
|
@ -377,13 +382,14 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
|
|||
static int sil_sata_busproc(ide_drive_t * drive, int state)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u32 stat_config = 0;
|
||||
unsigned long addr = siimage_selreg(hwif, 0);
|
||||
|
||||
if (hwif->mmio)
|
||||
stat_config = readl((void __iomem *)addr);
|
||||
else
|
||||
pci_read_config_dword(hwif->pci_dev, addr, &stat_config);
|
||||
pci_read_config_dword(dev, addr, &stat_config);
|
||||
|
||||
switch (state) {
|
||||
case BUSSTATE_ON:
|
||||
|
@ -643,7 +649,7 @@ static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const ch
|
|||
|
||||
static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
void *addr = pci_get_drvdata(dev);
|
||||
u8 ch = hwif->channel;
|
||||
hw_regs_t hw;
|
||||
|
@ -756,12 +762,14 @@ static void __devinit sil_quirkproc(ide_drive_t *drive)
|
|||
|
||||
static void __devinit init_iops_siimage(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
hwif->hwif_data = NULL;
|
||||
|
||||
/* Pessimal until we finish probing */
|
||||
hwif->rqsize = 15;
|
||||
|
||||
if (pci_get_drvdata(hwif->pci_dev) == NULL)
|
||||
if (pci_get_drvdata(dev) == NULL)
|
||||
return;
|
||||
|
||||
init_mmio_iops_siimage(hwif);
|
||||
|
@ -777,11 +785,12 @@ static void __devinit init_iops_siimage(ide_hwif_t *hwif)
|
|||
|
||||
static u8 __devinit ata66_siimage(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
unsigned long addr = siimage_selreg(hwif, 0);
|
||||
u8 ata66 = 0;
|
||||
|
||||
if (pci_get_drvdata(hwif->pci_dev) == NULL)
|
||||
pci_read_config_byte(hwif->pci_dev, addr, &ata66);
|
||||
if (pci_get_drvdata(dev) == NULL)
|
||||
pci_read_config_byte(dev, addr, &ata66);
|
||||
else
|
||||
ata66 = hwif->INB(addr);
|
||||
|
||||
|
|
|
@ -197,7 +197,7 @@ static char* chipset_capability[] = {
|
|||
|
||||
static u8 sis_ata133_get_base(ide_drive_t *drive)
|
||||
{
|
||||
struct pci_dev *dev = drive->hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u32 reg54 = 0;
|
||||
|
||||
pci_read_config_dword(dev, 0x54, ®54);
|
||||
|
@ -207,7 +207,7 @@ static u8 sis_ata133_get_base(ide_drive_t *drive)
|
|||
|
||||
static void sis_ata16_program_timings(ide_drive_t *drive, const u8 mode)
|
||||
{
|
||||
struct pci_dev *dev = drive->hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u16 t1 = 0;
|
||||
u8 drive_pci = 0x40 + drive->dn * 2;
|
||||
|
||||
|
@ -230,7 +230,7 @@ static void sis_ata16_program_timings(ide_drive_t *drive, const u8 mode)
|
|||
|
||||
static void sis_ata100_program_timings(ide_drive_t *drive, const u8 mode)
|
||||
{
|
||||
struct pci_dev *dev = drive->hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u8 t1, drive_pci = 0x40 + drive->dn * 2;
|
||||
|
||||
/* timing bits: 7:4 active 3:0 recovery */
|
||||
|
@ -253,7 +253,7 @@ static void sis_ata100_program_timings(ide_drive_t *drive, const u8 mode)
|
|||
|
||||
static void sis_ata133_program_timings(ide_drive_t *drive, const u8 mode)
|
||||
{
|
||||
struct pci_dev *dev = drive->hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u32 t1 = 0;
|
||||
u8 drive_pci = sis_ata133_get_base(drive), clk, idx;
|
||||
|
||||
|
@ -286,7 +286,7 @@ static void sis_program_timings(ide_drive_t *drive, const u8 mode)
|
|||
static void config_drive_art_rwp (ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 reg4bh = 0;
|
||||
u8 rw_prefetch = 0;
|
||||
|
||||
|
@ -307,7 +307,7 @@ static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
|||
|
||||
static void sis_ata133_program_udma_timings(ide_drive_t *drive, const u8 mode)
|
||||
{
|
||||
struct pci_dev *dev = drive->hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u32 regdw = 0;
|
||||
u8 drive_pci = sis_ata133_get_base(drive), clk, idx;
|
||||
|
||||
|
@ -326,7 +326,7 @@ static void sis_ata133_program_udma_timings(ide_drive_t *drive, const u8 mode)
|
|||
|
||||
static void sis_ata33_program_udma_timings(ide_drive_t *drive, const u8 mode)
|
||||
{
|
||||
struct pci_dev *dev = drive->hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u8 drive_pci = 0x40 + drive->dn * 2, reg = 0, i = chipset_family;
|
||||
|
||||
pci_read_config_byte(dev, drive_pci + 1, ®);
|
||||
|
@ -359,7 +359,7 @@ static void sis_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
|
||||
static u8 sis5513_ata133_udma_filter(ide_drive_t *drive)
|
||||
{
|
||||
struct pci_dev *dev = drive->hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u32 regdw = 0;
|
||||
u8 drive_pci = sis_ata133_get_base(drive);
|
||||
|
||||
|
@ -530,7 +530,7 @@ static const struct sis_laptop sis_laptop[] = {
|
|||
|
||||
static u8 __devinit ata66_sis5513(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *pdev = hwif->pci_dev;
|
||||
struct pci_dev *pdev = to_pci_dev(hwif->dev);
|
||||
const struct sis_laptop *lap = &sis_laptop[0];
|
||||
u8 ata66 = 0;
|
||||
|
||||
|
@ -545,12 +545,12 @@ static u8 __devinit ata66_sis5513(ide_hwif_t *hwif)
|
|||
if (chipset_family >= ATA_133) {
|
||||
u16 regw = 0;
|
||||
u16 reg_addr = hwif->channel ? 0x52: 0x50;
|
||||
pci_read_config_word(hwif->pci_dev, reg_addr, ®w);
|
||||
pci_read_config_word(pdev, reg_addr, ®w);
|
||||
ata66 = (regw & 0x8000) ? 0 : 1;
|
||||
} else if (chipset_family >= ATA_66) {
|
||||
u8 reg48h = 0;
|
||||
u8 mask = hwif->channel ? 0x20 : 0x10;
|
||||
pci_read_config_byte(hwif->pci_dev, 0x48, ®48h);
|
||||
pci_read_config_byte(pdev, 0x48, ®48h);
|
||||
ata66 = (reg48h & mask) ? 0 : 1;
|
||||
}
|
||||
|
||||
|
|
|
@ -78,7 +78,7 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
|
|||
*/
|
||||
static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
||||
{
|
||||
struct pci_dev *dev = HWIF(drive)->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
int reg = 0x44 + drive->dn * 4;
|
||||
u16 drv_ctrl;
|
||||
|
||||
|
@ -147,7 +147,7 @@ static inline void sl82c105_reset_host(struct pci_dev *dev)
|
|||
static void sl82c105_dma_lost_irq(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
|
||||
u8 dma_cmd;
|
||||
|
||||
|
@ -184,7 +184,7 @@ static void sl82c105_dma_lost_irq(ide_drive_t *drive)
|
|||
static void sl82c105_dma_start(ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
int reg = 0x44 + drive->dn * 4;
|
||||
|
||||
DBG(("%s(drive:%s)\n", __FUNCTION__, drive->name));
|
||||
|
@ -197,15 +197,17 @@ static void sl82c105_dma_start(ide_drive_t *drive)
|
|||
|
||||
static void sl82c105_dma_timeout(ide_drive_t *drive)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
|
||||
DBG(("sl82c105_dma_timeout(drive:%s)\n", drive->name));
|
||||
|
||||
sl82c105_reset_host(HWIF(drive)->pci_dev);
|
||||
sl82c105_reset_host(dev);
|
||||
ide_dma_timeout(drive);
|
||||
}
|
||||
|
||||
static int sl82c105_dma_end(ide_drive_t *drive)
|
||||
{
|
||||
struct pci_dev *dev = HWIF(drive)->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
int reg = 0x44 + drive->dn * 4;
|
||||
int ret;
|
||||
|
||||
|
@ -224,7 +226,7 @@ static int sl82c105_dma_end(ide_drive_t *drive)
|
|||
*/
|
||||
static void sl82c105_resetproc(ide_drive_t *drive)
|
||||
{
|
||||
struct pci_dev *dev = HWIF(drive)->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
|
||||
u32 val;
|
||||
|
||||
DBG(("sl82c105_resetproc(drive:%s)\n", drive->name));
|
||||
|
@ -293,6 +295,7 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
|
|||
*/
|
||||
static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
unsigned int rev;
|
||||
|
||||
DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
|
||||
|
@ -304,7 +307,7 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
|
|||
if (!hwif->dma_base)
|
||||
return;
|
||||
|
||||
rev = sl82c105_bridge_revision(hwif->pci_dev);
|
||||
rev = sl82c105_bridge_revision(dev);
|
||||
if (rev <= 5) {
|
||||
/*
|
||||
* Never ever EVER under any circumstances enable
|
||||
|
|
|
@ -26,7 +26,7 @@ static DEFINE_SPINLOCK(slc90e66_lock);
|
|||
static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
int is_slave = drive->dn & 1;
|
||||
int master_port = hwif->channel ? 0x42 : 0x40;
|
||||
int slave_port = 0x44;
|
||||
|
@ -79,7 +79,7 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
|||
static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 maslave = hwif->channel ? 0x42 : 0x40;
|
||||
int sitre = 0, a_speed = 7 << (drive->dn * 4);
|
||||
int u_speed = 0, u_flag = 1 << drive->dn;
|
||||
|
@ -122,13 +122,14 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
|||
|
||||
static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 reg47 = 0;
|
||||
u8 mask = hwif->channel ? 0x01 : 0x02; /* bit0:Primary */
|
||||
|
||||
hwif->set_pio_mode = &slc90e66_set_pio_mode;
|
||||
hwif->set_dma_mode = &slc90e66_set_dma_mode;
|
||||
|
||||
pci_read_config_byte(hwif->pci_dev, 0x47, ®47);
|
||||
pci_read_config_byte(dev, 0x47, ®47);
|
||||
|
||||
if (hwif->dma_base == 0)
|
||||
return;
|
||||
|
|
|
@ -164,7 +164,8 @@ static int tc86c001_busproc(ide_drive_t *drive, int state)
|
|||
|
||||
static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
|
||||
{
|
||||
unsigned long sc_base = pci_resource_start(hwif->pci_dev, 5);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
unsigned long sc_base = pci_resource_start(dev, 5);
|
||||
u16 scr1 = inw(sc_base + 0x00);
|
||||
|
||||
/* System Control 1 Register bit 15 (Soft Reset) set */
|
||||
|
|
|
@ -43,7 +43,7 @@
|
|||
static void triflex_set_mode(ide_drive_t *drive, const u8 speed)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 channel_offset = hwif->channel ? 0x74 : 0x70;
|
||||
u16 timing = 0;
|
||||
u32 triflex_timings = 0;
|
||||
|
|
|
@ -245,7 +245,7 @@ static void trm290_dma_host_set(ide_drive_t *drive, int on)
|
|||
|
||||
static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
unsigned int cfg_base = pci_resource_start(dev, 4);
|
||||
unsigned long flags;
|
||||
u8 reg = 0;
|
||||
|
|
|
@ -121,8 +121,8 @@ struct via82cxxx_dev
|
|||
|
||||
static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct via82cxxx_dev *vdev = pci_get_drvdata(dev);
|
||||
u8 t;
|
||||
|
||||
if (~vdev->via_config->flags & VIA_BAD_AST) {
|
||||
|
@ -159,8 +159,10 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
|
|||
|
||||
static void via_set_drive(ide_drive_t *drive, const u8 speed)
|
||||
{
|
||||
ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
|
||||
struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev);
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
ide_drive_t *peer = hwif->drives + (~drive->dn & 1);
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
struct via82cxxx_dev *vdev = pci_get_drvdata(dev);
|
||||
struct ide_timing t, p;
|
||||
unsigned int T, UT;
|
||||
|
||||
|
@ -408,7 +410,7 @@ static int via_cable_override(struct pci_dev *pdev)
|
|||
|
||||
static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *pdev = hwif->pci_dev;
|
||||
struct pci_dev *pdev = to_pci_dev(hwif->dev);
|
||||
struct via82cxxx_dev *vdev = pci_get_drvdata(pdev);
|
||||
|
||||
if (via_cable_override(pdev))
|
||||
|
|
|
@ -1200,7 +1200,7 @@ pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
|
|||
base = ioremap(macio_resource_start(mdev, 0), 0x400);
|
||||
regbase = (unsigned long) base;
|
||||
|
||||
hwif->pci_dev = mdev->bus->pdev;
|
||||
hwif->dev = &mdev->bus->pdev->dev;
|
||||
|
||||
pmif->mdev = mdev;
|
||||
pmif->node = mdev->ofdev.node;
|
||||
|
@ -1315,7 +1315,7 @@ pmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||
return -ENXIO;
|
||||
}
|
||||
|
||||
hwif->pci_dev = pdev;
|
||||
hwif->dev = &pdev->dev;
|
||||
pmif->mdev = NULL;
|
||||
pmif->node = np;
|
||||
|
||||
|
@ -1725,10 +1725,12 @@ pmac_ide_dma_lost_irq (ide_drive_t *drive)
|
|||
static void __devinit
|
||||
pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
|
||||
/* We won't need pci_dev if we switch to generic consistent
|
||||
* DMA routines ...
|
||||
*/
|
||||
if (hwif->pci_dev == NULL)
|
||||
if (dev == NULL)
|
||||
return;
|
||||
/*
|
||||
* Allocate space for the DBDMA commands.
|
||||
|
@ -1736,7 +1738,7 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
|
|||
* aligning the start address to a multiple of 16 bytes.
|
||||
*/
|
||||
pmif->dma_table_cpu = (struct dbdma_cmd*)pci_alloc_consistent(
|
||||
hwif->pci_dev,
|
||||
dev,
|
||||
(MAX_DCMDS + 2) * sizeof(struct dbdma_cmd),
|
||||
&hwif->dmatable_dma);
|
||||
if (pmif->dma_table_cpu == NULL) {
|
||||
|
|
|
@ -162,8 +162,8 @@ static void ide_pci_clear_simplex(unsigned long dma_base, const char *name)
|
|||
|
||||
static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif)
|
||||
{
|
||||
unsigned long dma_base = 0;
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
unsigned long dma_base = 0;
|
||||
u8 dma_stat = 0;
|
||||
|
||||
if (hwif->mmio)
|
||||
|
@ -391,7 +391,7 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port
|
|||
|
||||
hwif->noprobe = oldnoprobe;
|
||||
|
||||
hwif->pci_dev = dev;
|
||||
hwif->dev = &dev->dev;
|
||||
hwif->cds = d;
|
||||
hwif->channel = port;
|
||||
|
||||
|
|
|
@ -503,7 +503,8 @@ typedef struct hwif_s {
|
|||
|
||||
hwif_chipset_t chipset; /* sub-module for tuning.. */
|
||||
|
||||
struct pci_dev *pci_dev; /* for pci chipsets */
|
||||
struct device *dev;
|
||||
|
||||
const struct ide_port_info *cds; /* chipset device struct */
|
||||
|
||||
ide_ack_intr_t *ack_intr;
|
||||
|
@ -1299,7 +1300,7 @@ static inline void ide_dump_identify(u8 *id)
|
|||
|
||||
static inline int hwif_to_node(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = hwif->pci_dev;
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
return dev ? pcibus_to_node(dev->bus) : -1;
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue
Block a user