forked from luck/tmp_suning_uos_patched
ARM: OMAP4: MMC: fix power and audio issue, decouple USBC1 from MMC1
Remove OMAP4_USBC1_ICUSB_PWRDNZ_MASK during enable/disable PWRDNZ mode for MMC1_PBIAS and associated extended-drain MMC1 I/O cell. This is in accordance with the control module programming guide. This fixes a bug where if trying to use gpio_98 or gpio_99 and MMC1 at the same time the GPIO signal will be affected by a changing SDMMC1_VDDS. Software must keep MMC1_PBIAS cell and MMC1_IO cell PWRDNZ signals low whenever SDMMC1_VDDS ramps up/down or changes for cell protection purposes. MMC1 is based on SDMMC1_VDDS whereas USBC1 is based on SIM_VDDS therefore they can operate independently. Signed-off-by: Bryan Buckley <bryan.buckley@ti.com> Acked-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Tested-by: Balaji T K <balajitk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -137,8 +137,7 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
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*/
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reg = omap4_ctrl_pad_readl(control_pbias_offset);
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reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
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OMAP4_MMC1_PWRDNZ_MASK |
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OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
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OMAP4_MMC1_PWRDNZ_MASK);
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omap4_ctrl_pad_writel(reg, control_pbias_offset);
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}
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@ -156,8 +155,7 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
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else
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reg |= OMAP4_MMC1_PBIASLITE_VMODE_MASK;
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reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
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OMAP4_MMC1_PWRDNZ_MASK |
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OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
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OMAP4_MMC1_PWRDNZ_MASK);
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omap4_ctrl_pad_writel(reg, control_pbias_offset);
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timeout = jiffies + msecs_to_jiffies(5);
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@ -171,16 +169,14 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
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if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK) {
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pr_err("Pbias Voltage is not same as LDO\n");
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/* Caution : On VMODE_ERROR Power Down MMC IO */
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reg &= ~(OMAP4_MMC1_PWRDNZ_MASK |
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OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
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reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
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omap4_ctrl_pad_writel(reg, control_pbias_offset);
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}
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} else {
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reg = omap4_ctrl_pad_readl(control_pbias_offset);
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reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
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OMAP4_MMC1_PWRDNZ_MASK |
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OMAP4_MMC1_PBIASLITE_VMODE_MASK |
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OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
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OMAP4_MMC1_PBIASLITE_VMODE_MASK);
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omap4_ctrl_pad_writel(reg, control_pbias_offset);
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}
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}
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