forked from luck/tmp_suning_uos_patched
MIPS: BMIPS: Move post DMA flush implementation to common header
arch/mips/include/asm/mach-bmips/dma-coherence.h contains the plat_post_dma_flush implementation which is not specific to mach-bmips, but required for all BMIPS-based systems. Move plat_post_dma_flush to arch/mips/include/asm/bmips.h, rename it to bmips_post_dma_flush such that other platforms like bcm63xx can utilize it. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/9724/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -122,6 +122,22 @@ static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long data)
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barrier();
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}
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static inline void bmips_post_dma_flush(struct device *dev)
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{
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void __iomem *cbr = BMIPS_GET_CBR();
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u32 cfg;
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if (boot_cpu_type() != CPU_BMIPS3300 &&
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boot_cpu_type() != CPU_BMIPS4350 &&
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boot_cpu_type() != CPU_BMIPS4380)
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return;
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/* Flush stale data out of the readahead cache */
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cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
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__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
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__raw_readl(cbr + BMIPS_RAC_CONFIG);
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}
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#endif /* !defined(__ASSEMBLY__) */
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#endif /* _ASM_BMIPS_H */
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@ -49,20 +49,6 @@ static inline int plat_device_is_coherent(struct device *dev)
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return 0;
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}
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static inline void plat_post_dma_flush(struct device *dev)
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{
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void __iomem *cbr = BMIPS_GET_CBR();
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u32 cfg;
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if (boot_cpu_type() != CPU_BMIPS3300 &&
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boot_cpu_type() != CPU_BMIPS4350 &&
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boot_cpu_type() != CPU_BMIPS4380)
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return;
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/* Flush stale data out of the readahead cache */
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cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
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__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
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__raw_readl(cbr + BMIPS_RAC_CONFIG);
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}
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#define plat_post_dma_flush bmips_post_dma_flush
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#endif /* __ASM_MACH_BMIPS_DMA_COHERENCE_H */
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