AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

gpio: zynq: Do PM initialization earlier to support gpio hogs

Browse Source 
GPIO hogs registration is call at the end of gpiochip_add() function.
Calling sequence is:
gpiochip_add -> of_gpiochip_add -> of_gpiochip_scan_hogs ->
gpiod_hog -> gpiochip_request_own_desc -> __gpiod_request ->
chip->request -> zynq_gpio_request which calls pm_runtime_get_sync()
which returns -13 because PM is not initialized yet.

Initialize PM before gpiochip_add is called to fix this issue.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Michal Simek 2015-12-10 12:10:12 +01:00 committed by Linus Walleij
parent 29ab875b7b
commit 3773c195d3
1 changed files with 9 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
drivers/gpio/gpio-zynq.c
View File

@ -708,23 +708,23 @@ static int zynq_gpio_probe(struct platform_device *pdev)
chip->base = -1; chip->base = -1;
chip->ngpio = gpio->p_data->ngpio; chip->ngpio = gpio->p_data->ngpio;
/* Enable GPIO clock */ /* Retrieve GPIO clock */
gpio->clk = devm_clk_get(&pdev->dev, NULL); gpio->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(gpio->clk)) { if (IS_ERR(gpio->clk)) {
dev_err(&pdev->dev, "input clock not found.\n"); dev_err(&pdev->dev, "input clock not found.\n");
return PTR_ERR(gpio->clk); return PTR_ERR(gpio->clk);
} }
ret = clk_prepare_enable(gpio->clk);
if (ret) { pm_runtime_enable(&pdev->dev);
dev_err(&pdev->dev, "Unable to enable clock.\n"); ret = pm_runtime_get_sync(&pdev->dev);
if (ret < 0)
return ret; return ret;
}
/* report a bug if gpio chip registration fails */ /* report a bug if gpio chip registration fails */
ret = gpiochip_add(chip); ret = gpiochip_add(chip);
if (ret) { if (ret) {
dev_err(&pdev->dev, "Failed to add gpio chip\n"); dev_err(&pdev->dev, "Failed to add gpio chip\n");
goto err_disable_clk; goto err_pm_put;
} }
/* disable interrupts for all banks */ /* disable interrupts for all banks */
@ -742,15 +742,14 @@ static int zynq_gpio_probe(struct platform_device *pdev)
gpiochip_set_chained_irqchip(chip, &zynq_gpio_edge_irqchip, gpio->irq, gpiochip_set_chained_irqchip(chip, &zynq_gpio_edge_irqchip, gpio->irq,
zynq_gpio_irqhandler); zynq_gpio_irqhandler);
pm_runtime_set_active(&pdev->dev); pm_runtime_put(&pdev->dev);
pm_runtime_enable(&pdev->dev);
return 0; return 0;
err_rm_gpiochip: err_rm_gpiochip:
gpiochip_remove(chip); gpiochip_remove(chip);
err_disable_clk: err_pm_put:
clk_disable_unprepare(gpio->clk); pm_runtime_put(&pdev->dev);
return ret; return ret;
} }