forked from luck/tmp_suning_uos_patched
perf intel-pt: Synthesize new power and "ptwrite" events
Synthesize new power and ptwrite events. Power events report changes to C-state but I have also added support for the existing CBR (core-to-bus ratio) packet and included that when outputting power events. The PTWRITE packet is associated with the new "ptwrite" instruction, which is essentially just a way to stuff a 32 or 64 bit value into the PT trace. More details can be found in the patches that add documentation and in the Intel SDM. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: Andi Kleen <ak@linux.intel.com> Link: http://lkml.kernel.org/r/1498811805-2335-1-git-send-email-adrian.hunter@intel.com [ Copy the description of such packet from the patchkit cover message ] Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Adrian Hunter
Arnaldo Carvalho de Melo
parent
4a9fd4e0ef
commit
3797307576
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@ -92,6 +92,18 @@ struct intel_pt {
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u64 transactions_sample_type;
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u64 transactions_id;
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bool sample_ptwrites;
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u64 ptwrites_sample_type;
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u64 ptwrites_id;
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bool sample_pwr_events;
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u64 pwr_events_sample_type;
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u64 mwait_id;
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u64 pwre_id;
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u64 exstop_id;
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u64 pwrx_id;
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u64 cbr_id;
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bool synth_needs_swap;
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u64 tsc_bit;
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@ -102,6 +114,7 @@ struct intel_pt {
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u64 cyc_bit;
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u64 noretcomp_bit;
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unsigned max_non_turbo_ratio;
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unsigned cbr2khz;
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unsigned long num_events;
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@ -1236,6 +1249,175 @@ static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
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pt->transactions_sample_type);
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}
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static void intel_pt_prep_p_sample(struct intel_pt *pt,
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struct intel_pt_queue *ptq,
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union perf_event *event,
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struct perf_sample *sample)
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{
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intel_pt_prep_sample(pt, ptq, event, sample);
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/*
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* Zero IP is used to mean "trace start" but that is not the case for
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* power or PTWRITE events with no IP, so clear the flags.
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*/
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if (!sample->ip)
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sample->flags = 0;
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}
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static int intel_pt_synth_ptwrite_sample(struct intel_pt_queue *ptq)
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{
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struct intel_pt *pt = ptq->pt;
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union perf_event *event = ptq->event_buf;
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struct perf_sample sample = { .ip = 0, };
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struct perf_synth_intel_ptwrite raw;
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if (intel_pt_skip_event(pt))
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return 0;
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intel_pt_prep_p_sample(pt, ptq, event, &sample);
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sample.id = ptq->pt->ptwrites_id;
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sample.stream_id = ptq->pt->ptwrites_id;
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raw.flags = 0;
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raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
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raw.payload = cpu_to_le64(ptq->state->ptw_payload);
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sample.raw_size = perf_synth__raw_size(raw);
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sample.raw_data = perf_synth__raw_data(&raw);
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return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
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pt->ptwrites_sample_type);
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}
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static int intel_pt_synth_cbr_sample(struct intel_pt_queue *ptq)
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{
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struct intel_pt *pt = ptq->pt;
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union perf_event *event = ptq->event_buf;
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struct perf_sample sample = { .ip = 0, };
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struct perf_synth_intel_cbr raw;
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u32 flags;
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if (intel_pt_skip_event(pt))
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return 0;
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intel_pt_prep_p_sample(pt, ptq, event, &sample);
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sample.id = ptq->pt->cbr_id;
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sample.stream_id = ptq->pt->cbr_id;
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flags = (u16)ptq->state->cbr_payload | (pt->max_non_turbo_ratio << 16);
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raw.flags = cpu_to_le32(flags);
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raw.freq = cpu_to_le32(raw.cbr * pt->cbr2khz);
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raw.reserved3 = 0;
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sample.raw_size = perf_synth__raw_size(raw);
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sample.raw_data = perf_synth__raw_data(&raw);
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return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
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pt->pwr_events_sample_type);
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}
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static int intel_pt_synth_mwait_sample(struct intel_pt_queue *ptq)
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{
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struct intel_pt *pt = ptq->pt;
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union perf_event *event = ptq->event_buf;
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struct perf_sample sample = { .ip = 0, };
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struct perf_synth_intel_mwait raw;
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if (intel_pt_skip_event(pt))
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return 0;
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intel_pt_prep_p_sample(pt, ptq, event, &sample);
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sample.id = ptq->pt->mwait_id;
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sample.stream_id = ptq->pt->mwait_id;
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raw.reserved = 0;
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raw.payload = cpu_to_le64(ptq->state->mwait_payload);
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sample.raw_size = perf_synth__raw_size(raw);
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sample.raw_data = perf_synth__raw_data(&raw);
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return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
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pt->pwr_events_sample_type);
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}
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static int intel_pt_synth_pwre_sample(struct intel_pt_queue *ptq)
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{
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struct intel_pt *pt = ptq->pt;
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union perf_event *event = ptq->event_buf;
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struct perf_sample sample = { .ip = 0, };
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struct perf_synth_intel_pwre raw;
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if (intel_pt_skip_event(pt))
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return 0;
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intel_pt_prep_p_sample(pt, ptq, event, &sample);
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sample.id = ptq->pt->pwre_id;
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sample.stream_id = ptq->pt->pwre_id;
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raw.reserved = 0;
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raw.payload = cpu_to_le64(ptq->state->pwre_payload);
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sample.raw_size = perf_synth__raw_size(raw);
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sample.raw_data = perf_synth__raw_data(&raw);
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return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
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pt->pwr_events_sample_type);
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}
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static int intel_pt_synth_exstop_sample(struct intel_pt_queue *ptq)
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{
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struct intel_pt *pt = ptq->pt;
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union perf_event *event = ptq->event_buf;
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struct perf_sample sample = { .ip = 0, };
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struct perf_synth_intel_exstop raw;
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if (intel_pt_skip_event(pt))
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return 0;
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intel_pt_prep_p_sample(pt, ptq, event, &sample);
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sample.id = ptq->pt->exstop_id;
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sample.stream_id = ptq->pt->exstop_id;
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raw.flags = 0;
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raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
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sample.raw_size = perf_synth__raw_size(raw);
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sample.raw_data = perf_synth__raw_data(&raw);
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return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
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pt->pwr_events_sample_type);
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}
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static int intel_pt_synth_pwrx_sample(struct intel_pt_queue *ptq)
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{
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struct intel_pt *pt = ptq->pt;
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union perf_event *event = ptq->event_buf;
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struct perf_sample sample = { .ip = 0, };
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struct perf_synth_intel_pwrx raw;
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if (intel_pt_skip_event(pt))
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return 0;
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intel_pt_prep_p_sample(pt, ptq, event, &sample);
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sample.id = ptq->pt->pwrx_id;
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sample.stream_id = ptq->pt->pwrx_id;
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raw.reserved = 0;
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raw.payload = cpu_to_le64(ptq->state->pwrx_payload);
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sample.raw_size = perf_synth__raw_size(raw);
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sample.raw_data = perf_synth__raw_data(&raw);
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return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
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pt->pwr_events_sample_type);
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}
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static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
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pid_t pid, pid_t tid, u64 ip)
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{
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@ -1287,6 +1469,10 @@ static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
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PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
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}
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#define INTEL_PT_PWR_EVT (INTEL_PT_MWAIT_OP | INTEL_PT_PWR_ENTRY | \
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INTEL_PT_EX_STOP | INTEL_PT_PWR_EXIT | \
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INTEL_PT_CBR_CHG)
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static int intel_pt_sample(struct intel_pt_queue *ptq)
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{
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const struct intel_pt_state *state = ptq->state;
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@ -1298,6 +1484,34 @@ static int intel_pt_sample(struct intel_pt_queue *ptq)
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ptq->have_sample = false;
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if (pt->sample_pwr_events && (state->type & INTEL_PT_PWR_EVT)) {
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if (state->type & INTEL_PT_CBR_CHG) {
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err = intel_pt_synth_cbr_sample(ptq);
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if (err)
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return err;
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}
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if (state->type & INTEL_PT_MWAIT_OP) {
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err = intel_pt_synth_mwait_sample(ptq);
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if (err)
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return err;
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}
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if (state->type & INTEL_PT_PWR_ENTRY) {
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err = intel_pt_synth_pwre_sample(ptq);
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if (err)
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return err;
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}
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if (state->type & INTEL_PT_EX_STOP) {
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err = intel_pt_synth_exstop_sample(ptq);
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if (err)
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return err;
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}
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if (state->type & INTEL_PT_PWR_EXIT) {
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err = intel_pt_synth_pwrx_sample(ptq);
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if (err)
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return err;
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}
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}
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if (pt->sample_instructions && (state->type & INTEL_PT_INSTRUCTION)) {
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err = intel_pt_synth_instruction_sample(ptq);
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if (err)
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@ -1310,6 +1524,12 @@ static int intel_pt_sample(struct intel_pt_queue *ptq)
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return err;
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}
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if (pt->sample_ptwrites && (state->type & INTEL_PT_PTW)) {
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err = intel_pt_synth_ptwrite_sample(ptq);
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if (err)
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return err;
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}
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if (!(state->type & INTEL_PT_BRANCH))
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return 0;
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@ -2047,6 +2267,68 @@ static int intel_pt_synth_events(struct intel_pt *pt,
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id += 1;
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}
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attr.type = PERF_TYPE_SYNTH;
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attr.sample_type |= PERF_SAMPLE_RAW;
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if (pt->synth_opts.ptwrites) {
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attr.config = PERF_SYNTH_INTEL_PTWRITE;
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err = intel_pt_synth_event(session, "ptwrite", &attr, id);
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if (err)
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return err;
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pt->sample_ptwrites = true;
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pt->ptwrites_sample_type = attr.sample_type;
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pt->ptwrites_id = id;
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intel_pt_set_event_name(evlist, id, "ptwrite");
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id += 1;
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}
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if (pt->synth_opts.pwr_events) {
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pt->sample_pwr_events = true;
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pt->pwr_events_sample_type = attr.sample_type;
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attr.config = PERF_SYNTH_INTEL_CBR;
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err = intel_pt_synth_event(session, "cbr", &attr, id);
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if (err)
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return err;
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pt->cbr_id = id;
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intel_pt_set_event_name(evlist, id, "cbr");
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id += 1;
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}
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if (pt->synth_opts.pwr_events && (evsel->attr.config & 0x10)) {
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attr.config = PERF_SYNTH_INTEL_MWAIT;
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err = intel_pt_synth_event(session, "mwait", &attr, id);
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if (err)
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return err;
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pt->mwait_id = id;
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intel_pt_set_event_name(evlist, id, "mwait");
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id += 1;
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attr.config = PERF_SYNTH_INTEL_PWRE;
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err = intel_pt_synth_event(session, "pwre", &attr, id);
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if (err)
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return err;
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pt->pwre_id = id;
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intel_pt_set_event_name(evlist, id, "pwre");
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id += 1;
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attr.config = PERF_SYNTH_INTEL_EXSTOP;
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err = intel_pt_synth_event(session, "exstop", &attr, id);
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if (err)
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return err;
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pt->exstop_id = id;
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intel_pt_set_event_name(evlist, id, "exstop");
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id += 1;
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attr.config = PERF_SYNTH_INTEL_PWRX;
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err = intel_pt_synth_event(session, "pwrx", &attr, id);
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if (err)
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return err;
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pt->pwrx_id = id;
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intel_pt_set_event_name(evlist, id, "pwrx");
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id += 1;
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}
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pt->synth_needs_swap = evsel->needs_swap;
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return 0;
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@ -2313,6 +2595,7 @@ int intel_pt_process_auxtrace_info(union perf_event *event,
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intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
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intel_pt_log("Maximum non-turbo ratio %u\n",
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pt->max_non_turbo_ratio);
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pt->cbr2khz = tsc_freq / pt->max_non_turbo_ratio / 1000;
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}
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if (pt->synth_opts.calls)
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